JAJU732C June   2019  – July 2022

 

  1.   概要
  2.   Resources
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21530
      2. 2.2.2  AMC1311
      3. 2.2.3  AMC3302
      4. 2.2.4  AMC3306M05
      5. 2.2.5  LM76003
      6. 2.2.6  LMZ31707
      7. 2.2.7  OPA320
      8. 2.2.8  ISO7721
      9. 2.2.9  SN6501
      10. 2.2.10 SN6505B
      11. 2.2.11 TMP235
      12. 2.2.12 LMT87
      13. 2.2.13 TL431
      14. 2.2.14 LMV762
      15. 2.2.15 TMS320F280049 C2000 MCU
      16. 2.2.16 TMDSCNCD280049C
    3. 2.3 System Design Theory
      1. 2.3.1 Dual Active Bridge Analogy With Power Systems
      2. 2.3.2 Dual-Active Bridge - Switching Sequence
      3. 2.3.3 Dual-Active Bridge - Zero Voltage Switching (ZVS)
      4. 2.3.4 Dual-Active Bridge - Design Considerations
        1. 2.3.4.1 Leakage Inductor
        2. 2.3.4.2 Effect of Inductance on Current
        3. 2.3.4.3 Phase Shift
        4. 2.3.4.4 Capacitor Selection
        5. 2.3.4.5 Soft Switching Range
        6. 2.3.4.6 Switching Frequency
        7. 2.3.4.7 Transformer Selection
        8. 2.3.4.8 SiC MOSFET Selection
      5. 2.3.5 Loss Analysis
        1. 2.3.5.1 Design Equations
        2. 2.3.5.2 SiC MOSFET and Diode Losses
        3. 2.3.5.3 Transformer Losses
        4. 2.3.5.4 Inductor Losses
        5. 2.3.5.5 Gate Driver Losses
        6. 2.3.5.6 Efficiency
        7. 2.3.5.7 Thermal Considerations
  8. 3Circuit Description
    1. 3.1 Power Stage
    2. 3.2 DC Voltage Sensing
      1. 3.2.1 Primary DC Voltage Sensing
      2. 3.2.2 Secondary DC Voltage Sensing
    3. 3.3 Current Sensing
    4. 3.4 Power Architecture
      1. 3.4.1 Auxiliary Power Supply
      2. 3.4.2 Isolated Power Supply for Sense Circuits
    5. 3.5 Gate Driver
      1. 3.5.1 Gate Driver Circuit
      2. 3.5.2 Gate Driver Bias Power Supply
      3. 3.5.3 Gate Driver Discrete Circuits - Short-Circuit Detection and Two Level Turn Off
  9. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Required Hardware and Software
      1. 4.1.1 Hardware
      2. 4.1.2 Software
        1. 4.1.2.1 Getting Started With Software
        2. 4.1.2.2 Pin Configuration
        3. 4.1.2.3 PWM Configuration
        4. 4.1.2.4 High-Resolution Phase Shift Configuration
        5. 4.1.2.5 ADC Configuration
        6. 4.1.2.6 ISR Structure
    2. 4.2 Test Setup
    3. 4.3 PowerSUITE GUI
    4. 4.4 LABs
      1. 4.4.1 Lab 1
      2. 4.4.2 Lab 2
      3. 4.4.3 Lab 3
      4. 4.4.4 Lab 4
      5. 4.4.5 Lab 5
    5. 4.5 Test Results
      1. 4.5.1 Open-Loop Performance
      2. 4.5.2 Closed-Loop Performance
  10. 5Design Files
    1. 5.1 Schematics
    2. 5.2 Bill of Materials
    3. 5.3 PCB Layout Recommendations
      1. 5.3.1 Layout Prints
    4. 5.4 Altium Project
    5. 5.5 Gerber Files
    6. 5.6 Assembly Drawings
  11. 6Related Documentation
    1. 6.1 Trademarks
  12. 7Terminology
  13. 8About the Author
  14. 9Revision History

Lab 4

  • Test Setup for Lab 4 (Closed Current Loop - Isec)

    Compile the project by selecting Lab 4: Closed Loop Current with Resistive Load in the drop-down menu of Project Options from PowerSUITE GUI. Ensure current/voltage limits are set per operating conditions.

    #if DAB_LAB == 4
    #define DAB_CONTROL_RUNNING_ON C28X_CORE
    #define DAB_POWER_FLOW DAB_POWER_FLOW_PRIM_SEC
    #define DAB_INCR_BUILD DAB_CLOSED_LOOP_BUILD
    #define DAB_TEST_SETUP DAB_TEST_SETUP_RES_LOAD
    #define DAB_PROTECTION DAB_PROTECTION_ENABLED
    #define DAB_CONTROL_MODE DAB_CURRENT_MODE
    #define DAB_SFRA_TYPE 1
    #define DAB_SFRA_AMPLITUDE (float32_t)DAB_SFRA_INJECTION_AMPLITUDE_LEVEL1
    #endif
    1. Run the project by clicking green run button in CCS
    2. Populate the required variables in the watch window by loading javascript ' setupdebugenv_lab4.js' in the scripting console
      GUID-20210818-SS0I-FVZQ-LKSC-QC6GF0BQM8LG-low.png Figure 4-37 Lab 4 Watch View Configuration
    3. Enable PWM by writing “1” to the DAB_clearTrip variable
    4. In the watch view, check if the DAB_vPrimSensed_Volts, DAB_iPrimSensed_Amps, DAB_vSecSensed_Volts, and DAB_iSecSensed_Amps variables are updating periodically
    5. Set the output current by writing to DAB_iSecRef_Amps (in this example 1Adc)
    6. Enable closed loop operation by writing “1” to the DAB_closeGiLoop variable. The controller automatically adjusts the phase shift from default 0.032 to 0.04186 depending upon the operating conditions to generate secondary output current to match with that of DAB_iSecRef_Amps.
      Note: In the software the maximum phase shift is limited to 0.065 as a safety precaution. Please adjust the primary voltage to stay within the phase shift limits and still generate the required secondary current. Alternatively the maximum allowed phase shift can be modified to 0.15 in the code.
      GUID-20210818-SS0I-DZSS-JVJG-MFRJ06MRL7CV-low.png Figure 4-38 Lab 4 Watch View - Enable Closed Loop
    7. Now, slowly increase the input VPRIM DC voltage and adjust DAB_iSecRef_Amps accordingly to reach to the required operating point.
      Note: Ensure to limit the secondary current is limited to a safe value depending upon the output load. High impedance load can lead to dangerous secondary voltage which can destroy the board. Make sure secondary over voltage protection is enabled and the threshold is set to safe value.
      #define DAB_PROTECTION DAB_PROTECTION_ENABLED
      #define DAB_VSEC_TRIP_LIMIT ((float32_t)500)
      #define DAB_BOARD_PROTECTION_VSEC_OVERVOLTAGE 1
  • Frequency response of closed loop current
    1. Run the SFRA by clicking on the SFRA icon. The SFRA GUI will pop up.
    2. Select the options for the device on the SFRA GUI; for example, for F280049, select floating point. Click the Setup Connection button. In the pop-up window, uncheck the boot-on-connect option and select an appropriate COM port. Select the OK button. Return to the SFRA GUI and click Connect.
    3. The SFRA GUI will connect to the device. A SFRA sweep can now be started by clicking “Start Sweep”. The complete SFRA sweep will take a few minutes to finish. Monitor the activity in the progress bar on the SFRA GUI or by checking the flashing blue LED on the back of the control card, which indicates UART activity.

      The plot in Figure 4-39 is captured with the PI compensator (gain of 6).

      GUID-20210818-SS0I-V85X-GG8V-5S6K00HSXT79-low.png
      Test condition: VIN = 600 V, IOUT = 4.2 A, VOUT = 440 V
      Figure 4-39 Lab 4 SFRA Open Loop Plot for the Closed Current Loop

      Current is sensed by AMC3301 at battery(load) side. PI Controller information follows:

      #define DAB_GI_KP 6
      #define DAB_GI_KI 0.0063030
      #define DAB_GI_UMAX 0.06
      #define DAB_GI_UMIN 0.001
      #define DAB_GI_IMAX 2.0
      #define DAB_GI_IMIN ((float32_t) - 2.0)