The loss estimations also allow the heat output of the design to be characterized. Any electrical loss in the system is converted to waste heat. Thermal simulations were performed using the physical layout of the design by exporting a step 3D from Altium, as well as the expected energy losses. An off-the-shelf heat sink from Wakefield-Vette (OMNI-UNI-18-75) was selected to simplify the design process and provide a starting reference point for understanding the thermal performance. This data should be used as a starting point for a thermal solution and not a fully validated solution. The system was simulated using a worse-than-calculated thermal output of 25 W per switching device. This meant that 200 W of total power dissipation across all of the switches and an additional 75 W across the capacitor, transformer, and leakage inductor. Figure 2-26 shows the thermal simulation results.

Figure 2-26 Simulated Temperature Versus Time

This simulation shows that the maximum junction temperature of the SiC MOSFETs, when run without heat sink close to the rated load of 10 kW, is approximately 210°C. When the heat sink is mounted to the FETs, the temperature rise is limited to 125°C. On using active airflow, the maximum temperature of the MOSFETs is contained to 90°C. Similarly, the transformer temperature is approximately 55°C without heat sink and around 45°C with heat sink.

In tests conducted at 10 kW, the maximum temperature recorded in the hard switching SiC MOSFET of the primary side was approximately 55°C, and the temperature on the secondary side SiC MOSFETs were approximately 35°C because of ZVS turn across all of them. The transformer temperature was approximately 40°C with heat sink. The measurements were taken using thermal imager under forced air cooling for the SiC MOSFETs alone.