SPRUJH0B April   2025  – September 2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 External Power Supply or Accessory Requirements
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Hardware Description
      1. 2.1.1 Functional Description and Connections
        1. 2.1.1.1 Power Domains
        2. 2.1.1.2 LEDs
        3. 2.1.1.3 Encoder Connectors
        4. 2.1.1.4 Boot Modes
        5. 2.1.1.5 BoosterPack Sites
        6. 2.1.1.6 Analog Voltage Reference
        7. 2.1.1.7 Other Headers and Jumpers
          1. 2.1.1.7.1 USB Isolation Block
          2. 2.1.1.7.2 Alternate Power
          3. 2.1.1.7.3 5V Step-up Converter
        8. 2.1.1.8 Programmable Gain Amplifier (PGA)
      2. 2.1.2 Debug Interface
        1. 2.1.2.1 XDS110 Debug Probe
        2. 2.1.2.2 Virtual COM Port
      3. 2.1.3 Alternate Routing
        1. 2.1.3.1 Overview
        2. 2.1.3.2 GPIO35/GPIO37 Routing
        3. 2.1.3.3 eQEP Routing
        4. 2.1.3.4 X1, X2 Routing
        5. 2.1.3.5 PWM DAC
    2. 2.2 Using the F28E12x LaunchPad
    3. 2.3 BoosterPacks
    4. 2.4 Hardware Revisions
      1. 2.4.1 Revision A
      2. 2.4.2 Revision E2
  9. 3Software
    1. 3.1 Software Development
      1. 3.1.1 Software Tools and Packages
      2. 3.1.2 F28E12x LaunchPad Demo Program
      3. 3.1.3 Programming and Running Other Software on the F28E12x LaunchPad
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 LAUNCHXL-F28E12X Board Dimensions
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1. 5.1 Frequently Asked Questions
    2. 5.2 Trademarks
  12. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  13. 7Revision History

2.1.1.8 Programmable Gain Amplifier (PGA)

The F28E12x MCU features an on-chip Programmable Gain Amplifier (PGA) to amplify an input voltage for increasing the dynamic range of the downstream ADC and CMPSS modules. The integrated PGA helps to reduce the cost and design effort for many control applications that traditionally require external, stand-alone amplifiers. On-chip integration makes sure that the PGA is compatible with the downstream ADC and CMPSS modules. Software selectable gain and filter settings make the PGA adaptable to various performance needs. For more information on the PGAs, see the device-specific data sheet and technical reference manual.

The F28E12x LaunchPad was designed to optimize the routing of certain PGA signals to the BoosterPack connectors. This design choice allows for the evaluation of the on-chip PGA, if desired. One PGA module with pin multiplexer support for 3 positive inputs and 2 negative inputs are routed to the BoosterPack Connector. An RC filter can be placed on each of these signals to provide additional filtering of the input signal. By default, 0Ω series resistor and pads for a decoupling capacitor are placed on each PGA input signal. These values can be modified based on application requirements. Wherever a PGA signal is brought to the BoosterPack connector, an ADC input is also provided.

Table 2-7 summarizes the available PGA signals and connections. For the full connection details, see the LAUNCHXL-F28E12X Schematic.

Table 2-7 PGA Signals and Associated Connections
Booster Pack SitePin PositionPGA SignalADC Input SignalNote
1J3.27PGA1_INP1ADCINA11Populate RC filter if required
J3.28PGA1_INP2ADCINA16Populate RC filter if required
J3.29PGA1_INP3ADCINA6/ADCINA21Populate RC filter if required
J1.2PGA1_INM1ADCINA4

Disconnected by default. Jump to board GND or external voltage as needed.

J3.30

PGA1_INM2ADCINA0Disconnected by default. Jump to board GND or external voltage as needed.

J3.23

PGA1_OUT

ADCINA8

Used for verifying output of PGA1