In the asymmetric, high-voltage supply configuration, the excitation voltage applied to the bridge, V_EXCITATION, cannot typically be used as the ADC supply voltage. Instead, an additional lower-voltage supply (≤ 5 V) is required to power the ADC. Moreover, the ADC cannot directly use the high-voltage excitation source as the differential reference voltage, V_REF, and instead requires an attenuation circuit. Typically, a simple resistor divider is used as shown in Figure 6-5, though other options include a difference amplifier or a discrete voltage reference. Using a resistor divider or an amplifier can introduce errors between the bridge and the reference inputs that are not present between the bridge and the ADC inputs, resulting in a pseudo-ratiometric reference configuration. Choosing a discrete voltage reference results in a non-ratiometric configuration. Finally, choose the asymmetric supply voltages such that the bridge output common-mode voltage is within the lower-voltage input range of the ADC. Otherwise, additional input signal conditioning circuitry is necessary.

A four-wire resistive bridge measurement with a pseudo-ratiometric reference and asymmetric, high-voltage (> 5 V) supplies requires:

• Differential analog inputs (AINP and AINN)
• Differential reference inputs (REFP and REFN) or integrated voltage reference
• Low-noise amplifier
• High-voltage, asymmetric supplies
• V_REF attenuation circuit (resistor divider, difference amplifier, and so forth) or separate voltage reference

First, identify the maximum differential output voltage of the bridge, V_{OUT(Bridge Max)}, using the equation from Table 6-9 and parameters from Table 6-8. This value provides the maximum output voltage possible from the bridge under normal operating conditions and corresponds to the maximum load that can be applied to the bridge, Load_{(Bridge Max)}. If the system does not use the entire output range of the bridge, V_{OUT(System Max)} defines the maximum differential output signal that is applied to a specific system and Load_{(System Max)} is the corresponding maximum load. For example, if V_{OUT(Bridge Max)} corresponds to Load_{(Bridge Max)} = 5 kg, but the system specifications only require that Load_{(System Max)} = 2.5 kg, then V_{OUT(System Max)} is given by Equation 52:

Note that if Load_{(System Max)} = Load_{(Bridge Max)}, then V_{OUT(System Max)} = V_{OUT(Bridge Max)}.

After V_{OUT(System Max)} has been determined, choose the corresponding gain value for the amplifier. The amplifier gain should be the largest allowable value that is still less than the ADC full-scale range (FSR). In some cases it is not possible to choose an amplifier gain that uses the entire ADC FSR, especially when an ADC with an integrated PGA is selected. While this is often an acceptable tradeoff between resolution and ease-of-use, ensure that all system requirements are still met when the ADC FSR cannot be maximized.

Next, choose the values of the asymmetric supplies such that the bridge common-mode voltage, V_CM(Bridge), is within the common-mode range of the ADC amplifier under a no-load condition (R1 = R2 = R3 = R4). Typically, the target ADC amplifier common-mode voltage, V_CM(ADC), is selected to be at the ADC mid-supply voltage (AVDD / 2), though this is not a requirement. The amplifier common-mode range varies by component, and is defined in the data sheet based on the gain setting and supply voltage.

Using V_CM(ADC) and the selected bridge excitation voltage, V_EXCITATION, the asymmetric excitation voltages V_EXCITATION+ and V_EXCITATION- can be determined using Equation 53 and Equation 54:

After calculating V_EXCITATION+ and V_EXCITATION-, choose the system reference source. When selecting a discrete voltage reference, ensure this component is high accuracy and low-drift for best performance. To maintain a pseudo-ratiometric relationship between V_EXCITATION and V_REF, choose a resistor divider or a difference amplifier to attenuate the bridge excitation voltage. The resistor-divider method is more commonly-used and is shown in Figure 6-5 as three resistors in series. The reference voltage, V_REF, is established across the center component, R_REF. Equation 55 and Equation 56 determine the ratio of R_TOP and R_BOTTOM to R_REF using V_REF, the previously-determined V_EXCITATION± values, and the voltage seen at the REFN pin (V_REFN) in Figure 6-5:

For example, consider a system with the following constraints:

• V_EXCITATION = 15 V
• V_CM(ADC) = V_REF = 2.5 V
• R_REF = 4.7 kΩ
• V_REFN = 1.25 V

Use Equation 53 through Equation 56 to calculate the remaining system parameters:

• V_EXCITATION+ = 10 V
• V_EXCITATION- = –5 V
• R_{RATIO (TOP / REF)} = 2.5
• R_{RATIO (BOTTOM / REF)} = 2.5

Therefore, R_TOP = R_BOTTOM = 11.8 kΩ for this specific system. Figure 6-6 shows the various voltages (in blue) and resistor values (in red) that are used in this example.

Figure 6-6 Example Resistor and Voltage Values

Note that there are some implied constraints in Equation 55 and Equation 56, including V_EXCITATION+ > V_REFN > V_EXCITATION-, V_EXCITATION+ > V_EXCITATION-, and V_EXCITATION > V_REF. Otherwise, nonsensical results may occur, such as negative resistance values. Ultimately, check that the results of each equation meet all of the final design requirements as well as make physical sense.

It is also important to allow headroom near the maximum absolute and differential reference voltages applied to the ADC. Many systems seek to maximize the ADC dynamic range by maximizing V_REF. However, variations in the excitation voltage and resistor impedance may increase V_REF beyond the operating range of the ADC, which is typically limited to AVSS on V_REFN and AVDD on V_REFP. Under these conditions, consider a small reduction in the R_REF impedance to allow for system tolerances.

Select high accuracy (≤ 0.1%), low temperature-drift (≤ 10 ppm/°C) resistors for the reference path. Keep the nominal resistance value low to limit thermal noise. As an example, a 1-kΩ resistor at 25°C and 1-kHz bandwidth contributes 128 nV_RMS of noise. These conditions are important to keep V_REF as close as possible to being ratiometric with V_EXCITATION and minimize overall measurement error. Additionally, buffers might be required depending on the impedance of the differential reference inputs of the ADC. The buffer can also introduce errors and further reduce the ratiometric relationship between V_IN and V_REF.

Finally, follow the instructions in Section 5.5 if calibration is required.