SBAU249A October   2015  – July 2025 ADS9110

 

  1.   1
  2.   2
  3.   Trademarks
  4. 1Evaluation Module Overview
    1. 1.1 ADS9110EVM-PDK Features
    2. 1.2 ADS9110EVM Features
  5. 2Analog Interface
    1. 2.1 Connectors for Differential Signal Source
    2. 2.2 ADC Differential Input Signal Driver
      1. 2.2.1 Input Signal Path
      2. 2.2.2 Input Common-Mode Jumper Configuration
      3. 2.2.3 R1 Setting vs Source Impedance
    3. 2.3 Onboard ADC Reference
  6. 3Digital Interfaces
    1. 3.1 multiSPI® for ADC Digital IO
  7. 4Power Supplies
  8. 5 ADS9110EVM-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface (GUI) Software Installation
  9. 6 ADS9110EVM-PDK Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Register Map Configuration Tool
    3. 6.3 Time Domain Display Tool
    4. 6.4 Spectral Analysis Tool
    5. 6.5 Histogram Tool
    6. 6.6 Linearity Analysis Tool
  10. 7Hardware Design Files
    1. 7.1 Schematics
    2. 7.2 PCB Layout
    3. 7.3 Bill of Materials
  11. 8Revision History

2.2 ADC Differential Input Signal Driver

The differential signal inputs of the ADS9110 are not dynamically high impedance. SAR ADC inputs terminate in switched-capacitor networks that create large instantaneous current loads when the switches are closed that effectively make the ADC inputs dynamically low impedance. Thus, the evaluation board has low impedance on board drivers that maintain ADC performance with maximum loading at the full device throughput of 2-MSPS for signal.