SBAU487 August   2025

 

  1.   1
  2.   Description
  3.   Getting Started and Next Steps
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Block Diagram
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Header Information
    3. 2.3 Jumper Information
    4. 2.4 Slide Switches and Push Buttons
    5. 2.5 Test Points
    6. 2.6 Cautions and Warnings
    7. 2.7 Analog Inputs
      1. 2.7.1 Voltage Inputs
        1. 2.7.1.1 Voltage Measurement Analog Front End
      2. 2.7.2 Current Sensor Inputs
        1. 2.7.2.1 Current Measurement Analog Front End
          1. 2.7.2.1.1 Rogowski Coil Inputs
      3. 2.7.3 Analog Gain Setting
  9. 3Software Installation
    1. 3.1 GUI Operation
    2. 3.2 Launch the Metrology Software
  10. 4Energy Metrology Software Overview
    1. 4.1 Using the ADS131M08MET-EVM
      1. 4.1.1 Measuring Voltage and Current
        1. 4.1.1.1 Calibration Procedure
          1. 4.1.1.1.1 Gain Calibration
          2. 4.1.1.1.2 Voltage and Current Gain Calibration
          3. 4.1.1.1.3 Active Power Gain Calibration
          4. 4.1.1.1.4 Offset Calibration
          5. 4.1.1.1.5 Phase Calibration
    2. 4.2 Test Accuracy Results
      1. 4.2.1 Current Transformer Results
      2. 4.2.2 Rogowski Coil Results
    3. 4.3 Developing an Application
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 Bill of Materials (BOM)
    3. 5.3 PCB Layouts
  12. 6Design and Documentation Support
    1. 6.1 Design Files
      1. 6.1.1 PCB Layout Recommendations
    2. 6.2 Tools and Software
    3. 6.3 Documentation Support
    4. 6.4 Support Resources
    5. 6.5 Trademarks

2.7.2.1 Current Measurement Analog Front End

The analog front end for current inputs is different from the analog front end for the voltage inputs. Figure 2-2 shows the analog front end used for a current channel, where the positive and negative leads from a CT for Phase A are connected to pins 1 and 3 of header J4. Again, identical circuitry is used for the CTs on each of the Phases B, C, and neutral.

The analog front end for current consists of footprints for electromagnetic interference filter beads (R34 and R16), burden resistors for current transformers (R32 and R21), and an RC low-pass filter (R33, R17, C13, C16, and C14) that functions as an anti-alias filter.

As Figure 2-2 shows, resistors R32 and R21 are the burden resistors, which are in series with each other. For best Total Harmonic Distortion (THD) performance, instead of using one burden resistor, two identical burden resistors in series are used with the common point being connected to GND. This split-burden resistor configuration makes sure that the waveforms fed to the positive and negative terminals of the ADC are 180 degrees out of phase with each other, which provides the best THD results with this ADC. The total burden resistance is selected based on the current range used and the turns ratio specification of the CT (this EVM used 100A CTs with a turns ratio of 2500:1). The total value of the burden resistor for this design is 12.98Ω.

Equation 2 shows how to calculate the range of differential voltages fed to the current ADC channel for a given maximum current, CT turns ratio, and burden resistor value.

Equation 2. VADC_Swing,Current=±2(R32+R21)IRMS,maxCTTURNS_RATIO

Based on the maximum CT current of 100A, turns ratio of 2500:1, and burden resistor of 12.98Ω, the input signal to the current ADC has a voltage swing of ±918mV maximum (649mVRMS) when the maximum current rating of 100A is applied. This ±918mV maximum input voltage is well within the ±1.2V input range of the ADS131M08 for the default PGA gain of 1 that is used for the current channels.