SBOSAJ7A October   2025  – December 2025 TMP4719

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Initialization and Default Temperature Conversion
      2. 7.3.2 Series Resistance Cancellation
      3. 7.3.3 ALERT and T_CRIT Output
      4. 7.3.4 1.2V Logic Compatible Inputs
      5. 7.3.5 Digital Filter
      6. 7.3.6 One-Shot Conversions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Interrupt and Comparator Mode
        1. 7.4.1.1 Interrupt Mode
        2. 7.4.1.2 Comparator Mode
        3. 7.4.1.3 T_CRIT Output
      2. 7.4.2 Shutdown Mode
      3. 7.4.3 Continuous Conversion Mode
    5. 7.5 Programming
      1. 7.5.1 Temperature Data Format
      2. 7.5.2 I2C and SMBus Interface
      3. 7.5.3 Serial Bus Address
      4. 7.5.4 Bus Transactions
        1. 7.5.4.1 Writes
        2. 7.5.4.2 Reads
      5. 7.5.5 SMBus Alert Mode
  9. 8 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.5.2 I2C and SMBus Interface

The TMP4719 has a standard bidirectional I2C interface that can be configured or read by a controller. Each target on the I2C bus has a specific device address to differentiate between other target devices that are on the same I2C bus. Target devices require configuration upon start-up to set the behavior of the device. This is typically done when the controller accesses internal register maps of the target, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read. The TMP4719 includes 50ns glitch suppression filters, allowing the device to coexist on I3C mixed bus.

The physical I2C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to a bus supply through a pullup resistor. The size of the pullup resistor is determined by the amount of capacitance on the I2C lines and communication speed. See also the I2C Bus Pullup Resistor Calculation application note. Data transfer can be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition (see Figure 7-10 and Figure 7-11). See the Writes and Reads sections for detailed procedures on how the controller can access the TMP4719.

TMP4719 Definition of Start and Stop ConditionsFigure 7-10 Definition of Start and Stop Conditions
TMP4719 Bit TransferFigure 7-11 Bit Transfer