SLAAED9 November   2023 TAA5412-Q1 , TAC5311-Q1 , TAC5312-Q1 , TAC5411-Q1 , TAC5412-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. Diagnostic Monitoring Architecture
  6. Monitored Faults
    1. 3.1 Microphone Faults
      1. 3.1.1 Inputs Shorted to Ground
      2. 3.1.2 Inputs Shorted to MICBIAS
      3. 3.1.3 Input Open Circuit
      4. 3.1.4 Input Pins Shorted Together
      5. 3.1.5 Input Overvoltage Detection
      6. 3.1.6 Inputs Shorted to VBAT
    2. 3.2 Line Out Faults
      1. 3.2.1 Output Overcurrent
      2. 3.2.2 Virtual Ground
    3. 3.3 Other Faults
      1. 3.3.1 MICBIAS Overvoltage
        1. 3.3.1.1 DIAG_CFG11 Register (page = 0x01, address = 0x51) [Reset = 0x40]
      2. 3.3.2 MICBIAS Overcurrent
      3. 3.3.3 MICBIAS Load Current
        1. 3.3.3.1 DIAG_CFG6 Register (page = 0x01, address = 0x4C) [Reset = 0xA2]
        2. 3.3.3.2 DIAG_CFG7 Register
      4. 3.3.4 Overtemperature Fault
      5. 3.3.5 Supply Back Pumping
  7. Enabling Diagnostics and Programming Thresholds
    1. 4.1 DIAG_CFG0 Register (page = 0x01, Address = 0x46) [Reset = 0x00]
    2. 4.2 DIAG_CFG1 Register (page = 0x01, Address = 0x47) [Reset = 0x37]
    3. 4.3 DIAG_CFG2 Register (page = 0x01, Address = 0x48) [Reset = 0x87]
  8. Fault Diagnostic Setup Procedure
  9. Fault Reporting
    1. 6.1 Live Registers
      1. 6.1.1 CHx_LIVE Register (page = 0x01, address = 0x3D) [Reset = 0b]
      2. 6.1.2 CH1_LIVE Register (page = 0x01, address = 0x3E) [Reset = 0h]
      3. 6.1.3 INT_LIVE0 Register (page = 0x01, address = 0x3C) [Reset = 00]
      4. 6.1.4 INT_LIVE1 Register (page = 0x00, address = 0x42) [reset = 0x00]
      5. 6.1.5 INT_LIVE2 Register (page = 0x00, address = 0x43) [reset = 0x00]
    2. 6.2 Latched Registers
      1. 6.2.1 Clearing Latched Registers
    3. 6.3 Fault Filtering and Response Time
      1. 6.3.1 Debounce
      2. 6.3.2 Scan Rate
        1. 6.3.2.1 DIAG_CFG4 Register (page = 0x01, address = 0x4A) [reset = 0xB8]
      3. 6.3.3 Moving Average
        1. 6.3.3.1 DIAG_CFG5 Register (page = 0x01, address = 0x4B) [reset = 0h]
  10. Responding to a Fault
    1. 7.1 INT_CFG Register (page = 0x00, address = 0x42) [reset = 0b]
      1. 7.1.1 DIAG_CFG10 Register (page = 0x01, address = 0x50) [Reset = 0x88]
    2. 7.2 Manual Recovery Sequence
    3. 7.3 Recommended Fault Register Read Sequence
  11. Using PurePath Console
    1. 8.1 Advanced Tab
    2. 8.2 Diagnostics Walk-through
      1. 8.2.1 Diagnostics Configuration
      2. 8.2.2 Debounce Configuration
      3. 8.2.3 Latched Fault Status
  12. Diagnostic Monitoring Registers
    1. 9.1 Voltage Measurements
    2. 9.2 MICBIAS Load Current
    3. 9.3 Internal Die Temperature
  13. 10Summary
  14. 11References

DIAG_CFG5 Register (page = 0x01, address = 0x4B) [reset = 0h]

This register is configuration register 5 for input fault diagnostics setting.

Table 6-7 DIAG_CFG5 Register Field Descriptions
BitFieldType(1)ResetDescription
7-6DIAG_MOV_AVG_CFG[1:0]R/W00bMoving average configuration
0d = Moving average disabled
1d = Moving average enabled with 0.5 weightage for new and old data
2d = Moving average enabled with 0.75 weightage for old data and 0.25 weightage for new data
3d = Reserved
5MOV_AVG_DIS_MBIAS_LOADR/W0bMoving average configuration for MICBIAS Load channel
0b = Moving average is enabled for MICBIAS Load channel
1b = Moving average is disabled for MICBIAS Load channel
4MOV_AVG_DIS_TEMP_SENSR/W0bMoving average configuration for Temp Sense channel
0b = Moving average is enabled for Temp Sense channel
1b = Moving average is disabled for Temp Sense channel
3MOV_AVG_DIS_GPAR/W0bMoving average configuration for GPA channel
0b = Moving average is enabled for GPA channel
1b = Moving average is disabled for GPA channel
2-0RESERVEDR000bReserved bits; Write only reset values
R/W = Read or Write; R = Read

If the moving average feature is not used, the fault response time can be calculated as the scan rate multiplied by the debounce setting. For example, a debounce of 8 and scan rate of 4 ms requires a fault to be present for 32 ms before latching the corresponding fault register. This behavior is useful for filtering out transient behaviors, such as the start-up response of a microphone. If the moving average feature is used, then the exact response time depends on the nature of the fault and the amplitude of the input signal causing the fault. This setting can be useful in particularly noisy applications in which the microphone is prone to saturate for a portion of the time. Setting the scan rate to continuous provides the fastest response. The exact response time depends on many factors. To simplify calculation, the following equation shows how to calculate the effective response time in back-to-back scan mode.

Equation 1. Response Time = 450 ×N+1000×DIAG_CLK_PERIOD

Where

  • N is the number of channels (1 to 2) enabled for diagnostics scan using page-0, register-70d
  • And DIAG_CLK_PERIOD is the period of the clock used for the diagnostic state-machine

The diagnostic clock period depends on whether valid clocks are present and the sample rate. The diagnostic clock frequency is 6.144 MHz for all ASI sample rate multiples and sub-multiples of 48 kHz. Similarly, the frequency is 5.644 MHz for all ASI sample rate multiples and sub-multiples of 44.1 kHz. If no clocks are present or there is an error in the clocks, then the diagnostic clock defaults to the 5-MHz (typical) clock generated using the internal on-chip oscillator.

Live registers always report the most recent reading and are not influenced by the debounce or moving average settings. The faults in INT_LTCH0 are also not affected by these filter settings.