SLAAED9 November   2023 TAA5412-Q1 , TAC5311-Q1 , TAC5312-Q1 , TAC5411-Q1 , TAC5412-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Diagnostic Monitoring Architecture
  6. 3 Monitored Faults
    1. 3.1 Microphone Faults
      1. 3.1.1 Inputs Shorted to Ground
      2. 3.1.2 Inputs Shorted to MICBIAS
      3. 3.1.3 Input Open Circuit
      4. 3.1.4 Input Pins Shorted Together
      5. 3.1.5 Input Overvoltage Detection
      6. 3.1.6 Inputs Shorted to VBAT
    2. 3.2 Line Out Faults
      1. 3.2.1 Output Overcurrent
      2. 3.2.2 Virtual Ground
    3. 3.3 Other Faults
      1. 3.3.1 MICBIAS Overvoltage
        1. 3.3.1.1 DIAG_CFG11 Register (page = 0x01, address = 0x51) [Reset = 0x40]
      2. 3.3.2 MICBIAS Overcurrent
      3. 3.3.3 MICBIAS Load Current
        1. 3.3.3.1 DIAG_CFG6 Register (page = 0x01, address = 0x4C) [Reset = 0xA2]
        2. 3.3.3.2 DIAG_CFG7 Register
      4. 3.3.4 Overtemperature Fault
      5. 3.3.5 Supply Back Pumping
  7. 4 Enabling Diagnostics and Programming Thresholds
    1. 4.1 DIAG_CFG0 Register (page = 0x01, Address = 0x46) [Reset = 0x00]
    2. 4.2 DIAG_CFG1 Register (page = 0x01, Address = 0x47) [Reset = 0x37]
    3. 4.3 DIAG_CFG2 Register (page = 0x01, Address = 0x48) [Reset = 0x87]
  8. 5 Fault Diagnostic Setup Procedure
  9. 6 Fault Reporting
    1. 6.1 Live Registers
      1. 6.1.1 CHx_LIVE Register (page = 0x01, address = 0x3D) [Reset = 0b]
      2. 6.1.2 CH1_LIVE Register (page = 0x01, address = 0x3E) [Reset = 0h]
      3. 6.1.3 INT_LIVE0 Register (page = 0x01, address = 0x3C) [Reset = 00]
      4. 6.1.4 INT_LIVE1 Register (page = 0x00, address = 0x42) [reset = 0x00]
      5. 6.1.5 INT_LIVE2 Register (page = 0x00, address = 0x43) [reset = 0x00]
    2. 6.2 Latched Registers
      1. 6.2.1 Clearing Latched Registers
    3. 6.3 Fault Filtering and Response Time
      1. 6.3.1 Debounce
      2. 6.3.2 Scan Rate
        1. 6.3.2.1 DIAG_CFG4 Register (page = 0x01, address = 0x4A) [reset = 0xB8]
      3. 6.3.3 Moving Average
        1. 6.3.3.1 DIAG_CFG5 Register (page = 0x01, address = 0x4B) [reset = 0h]
  10. 7 Responding to a Fault
    1. 7.1 INT_CFG Register (page = 0x00, address = 0x42) [reset = 0b]
      1. 7.1.1 DIAG_CFG10 Register (page = 0x01, address = 0x50) [Reset = 0x88]
    2. 7.2 Manual Recovery Sequence
    3. 7.3 Recommended Fault Register Read Sequence
  11. 8 Using PurePath Console
    1. 8.1 Advanced Tab
    2. 8.2 Diagnostics Walk-through
      1. 8.2.1 Diagnostics Configuration
      2. 8.2.2 Debounce Configuration
      3. 8.2.3 Latched Fault Status
  12. 9 Diagnostic Monitoring Registers
    1. 9.1 Voltage Measurements
    2. 9.2 MICBIAS Load Current
    3. 9.3 Internal Die Temperature
  13. 10Summary
  14. 11References

2 Diagnostic Monitoring Architecture

Typical automotive audio applications favor the use of electret condenser microphones (ECM) for ease of mounting, interfacing, pickup directionality, moisture, and dust protection. These ECM microphones operate between 2 V to 10 V and can have large voltage swings. For accurate fault detection the ADC is required to interface directly with the microphone pins. For an AC-coupled application, designs require doubling the number of input pins as shown in Figure 2-1.

GUID-20231108-SS0I-MBLX-GZCG-HFNP2NZ4VGMM-low.svgFigure 2-1 AC-coupled Diagnostics

This configuration also requires that the inputs use high-voltage transistors to handle the 10-VRMS swing directly. Together, these two factors lead to a very large solution size. Because of the doubling of input pin and added transistors, the TAx5xxx-Q1 family uses DC coupling for fault diagnostics with an attenuator on the front end of the signal chain to allow the input and the diagnostics to operate using a single pin. This design is shown in Figure 2-2.

GUID-20231108-SS0I-MDSM-GT2G-CNSRVLVTXBGL-low.svgFigure 2-2 DC-coupled Diagnostics

AC coupling has benefits as well, such as higher input swing and more filtering flexibility. For applications that desire AC coupling with fault diagnostics, using a channel for AC-coupled analog inputs and dedicating the other channel to the DC-coupled diagnostics is possible. Figure 2-3 shows an example of channel 1 with AC-coupled microphone inputs and channel 2 is being used for microphone diagnostics. In this configuration, faults on channels 1 are recorded in the diagnostic registers for channel 2. Enabling the primary ADC for channel 2 is not necessary and is used only for diagnostics.

GUID-20231108-SS0I-CR1N-CKZW-CZPSR1K5T9GM-low.svgFigure 2-3 AC-coupled Inputs With DC Diagnostics

Figure 2-3 depicts a TAx5xxx diagnostic monitoring architecture for a fault monitoring signal chain.

GUID-20231108-SS0I-NQL7-KVCP-GV7QDDBMRBW7-low.svgFigure 2-4 Diagnostics Monitoring Architecture

All of the input pins are monitored (4 pins for the 2-channel devices) along with the MICBIAS pin voltage, MICBIAS load current, VBAT_IN input, and internal die temperature. The input pins first pass through an attenuator, which scales the signal down by a factor of 17 before reaching the scanning multiplexer (MUX). The MUX automatically scans all inputs where diagnostics are enabled in a consecutive manner. The scan rate is adjustable in the DIAG_CFG3 register (Page 1, address 0x49). Once an input is selected by the scanning MUX, eight consecutive samples of the input are collected and averaged to improve the noise performance. Note that disabling the diagnostics for a channel is independent of disabling the channel, and diagnostics can still be read on inactive channels.