SLAAEQ4 July   2025 MSPM0G1106 , MSPM0G1107 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1

 

  1.   1
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Features Supported
    2. 1.2 CAN Frame Format
    3. 1.3 SPI Message Frame Format
  4. 2Implementation
    1. 2.1 SPI Message Format
      1. 2.1.1 SPI Commands
      2. 2.1.2 Instruction Set
    2. 2.2 Timeout Feature
    3. 2.3 Error Indication
    4. 2.4 Busy Status Indication
    5. 2.5 Message RAM Configuration
    6. 2.6 Test Environment
  5. 3References

2.1.2 Instruction Set

Bit Modify Instruction

MSPM0G3507 Bit Modify Instruction Format Figure 2-2 Bit Modify Instruction Format

Opcode: 0b0000000000010000

The Bit modify Instruction is used to set or clear individual bits in a specific CAN register. The mask bits determine which bits in the register can be changed. A bit 1 in the mask allows the corresponding bit in the register to change, while a bit 0 prevents the bit from changing.

Reset Instruction

MSPM0G3507 Reset Instruction Format Figure 2-3 Reset Instruction Format

Opcode: 0b0000000000100000

The Reset instruction resets the CAN module in the SPI – CAN Bridge device. To reset the CAN module, the user needs to send the corresponding opcode through the SPI protocol.

Power Enable and CAN Configuration Instruction:

MSPM0G3507 Power Enable and CAN Configuration Instruction Format Figure 2-4 Power Enable and CAN Configuration Instruction Format

Opcode: 0b0000000000110000

The Power Enable and CAN Configuration Instruction is used to Power enable the CAN module in the Bridge device. Also, the predefined CAN message RAM configurations are done once CAN module is enabled.

Load TX Buffer Instruction:

MSPM0G3507 Load TX Buffer Instruction Format Figure 2-5 Load TX Buffer Instruction Format

Opcode: 0b00000000010000ab

The Load TX Buffer instruction is used to load the CAN frame into the selected Transmit buffers. The transmit buffer selection is encoded in the opcode. One of the four transmit buffer can be selected based on the a, b bits in the instruction field.

Table 2-2 Load TX Buffer mapping
a b Buffer
0 0 Buffer – 0
0 1 Buffer – 1
1 0 Buffer – 2
1 1 Buffer – 3

Load TX FIFO Instruction:

MSPM0G3507 Load TX FIFO Instruction Figure 2-6 Load TX FIFO Instruction

Opcode: 0b0000000001010000

The Load TX FIFO instruction is used to load the CAN frame to be transmitted into the Transmit FIFO. User must take care that the transmit FIFO is not full before loading CAN frame into the Transmit FIFO.

Request to Send TX Buffer Instruction

MSPM0G3507 Request to send TX Buffer Instruction format Figure 2-7 Request to send TX Buffer Instruction format

Opcode: 0b00000000011000ab

The Request to send TX Buffer Instruction adds the transmission request for one of the four transmit buffers. The transmit buffer selection is encoded in the opcode. One of the four transmit buffer can be selected based on the a, b bits in the instruction field.

Table 2-3 Request to send TX Buffer mapping
a b Buffer
0 0 Buffer – 0
0 1 Buffer – 1
1 0 Buffer – 2
1 1 Buffer – 3

Request to send TXFIFO Instruction

MSPM0G3507 Request to Send TXFIFO Instruction Format Figure 2-8 Request to Send TXFIFO Instruction Format

Opcode: 0b0000000001110000

The request to send TX FIFO instruction adds the transmission request for one of the transmit FIFO elements based on the Transmit FIFO put index. The user needs to make sure that the Transmit FIFO has a CAN Frame before sending buffer add request.

Write Register Instruction

MSPM0G3507 Write Register Instruction Format Figure 2-9 Write Register Instruction Format

Opcode: 0b0000000010000000

Offset Address – To point to the register address to write the register data.

The Write Register instruction is used to configure the CAN Registers through the SPI Peripheral. The data is written into the corresponding register based on the Offset address.

Read Register Data Instruction:

MSPM0G3507 Read Register Data Instruction Format Figure 2-10 Read Register Data Instruction Format

Opcode: 0b0000000010000000

Offset Address – To point to the register address to read the Register Data.

Read register data Instruction is used to read the data from the specific CAN register. The Read register data instruction only reads the register but does not transmit. Hence, each Read register data instruction must be followed by a Fetch register data instruction.

Fetch Register Data Instruction:

MSPM0G3507 Fetch Register Data Instruction format Figure 2-11 Fetch Register Data Instruction format

Opcode: 0b0000000010100000

The Fetch register data instruction transmits the register value that was read using Read register data instruction.

Read RX Buffer Data Instruction:

MSPM0G3507 Read RX Buffer Data Instruction Format Figure 2-12 Read RX Buffer Data Instruction Format

Opcode: 0b00000000101100xy

When the SPI-CAN bridge receives a new CAN frame from the CAN network, the SPI-CAN bridge toggles the GPIO pin as shown in Figure 2-12 to indicate the reception of the frame to the SPI controller.

To retrieve received CAN frames from the CAN module RX Buffer in the SPI-CAN bridge, the following sequence must be followed:

  1. First, use the Read RX status data instruction followed by Fetch RX status data instruction to identify which RX Buffer contains the received CAN frame.
  2. Then, execute the Read RX buffer instruction to access the buffer contents. Note that this instruction only reads the buffer location but does not transfer the data.
  3. Finally, execute the Fetch RX Buffer data instruction to actually retrieve the data from the buffer.

Each Read RX buffer instruction must be paired with a corresponding Fetch RX Buffer data instruction to complete the data transfer.

The RX buffer selection is encoded in the opcode. One of the four RX buffer can be selected based on the x, y bits in the instruction.

Table 2-4 Read RX Buffer mapping
X y Buffer
0 0 Buffer – 0
0 1 Buffer – 1
1 0 Buffer – 2
1 1 Buffer – 3

Fetch RX Buffer Data Instruction

MSPM0G3507 Fetch RX Buffer Data Instruction format Figure 2-13 Fetch RX Buffer Data Instruction format

Opcode: 0b0000000011000000

The Fetch RX buffer Data Instruction transmits the RX buffer data that was read using Read RX buffer instruction.

Read RX FIFO Data Instruction:

MSPM0G3507 Read RXFIFO Data Instruction Format Figure 2-14 Read RXFIFO Data Instruction Format

Opcode: 0b0000000011010000

When the SPI-CAN bridge receives a new CAN frame from the CAN network, the SPI-CAN bridge toggles the GPIO pin as shown in Figure 2-14 to indicate the reception of the frame to the SPI controller.

To retrieve received CAN frames from the CAN module's RX FIFO in the SPI-CAN bridge, the following sequence must be followed:

  1. First, use the Read RX status data instruction followed by Fetch RX status data instruction to get the information about the RXFIFO state.
  2. Then, execute the Read RX FIFO data instruction to access the fifo element contents. Based on the RX FIFO get index, Rx FIFO element is selected and data is read and stored in an Array. Note that this instruction only reads the fifo element location but does not transfer the data.
  3. Finally, execute the Fetch RX FIFO data instruction to actually retrieve the data from the fifo.

Fetch RX FIFO Data Instruction:

MSPM0G3507 Fetch RXFIFO Data Instruction format Figure 2-15 Fetch RXFIFO Data Instruction format

Opcode: 0b0000000011100000

The Fetch RX FIFO Data Instruction transmits the RX FIFO data that was read using Read RX FIFO instruction.

Read Receive Status Data Instruction

MSPM0G3507 Read Receive Status Data Instruction Format Figure 2-16 Read Receive Status Data Instruction Format

Opcode: 0b0000000011110000

The Read receive status data instruction is used to get status bits of CAN module from SPI to CAN device. The meaning of data bits received as response to this instruction is shown in Figure 2-17.

MSPM0G3507 Status Bits indication Figure 2-17 Status Bits indication
  • B0 – B4: RX Buffers New data status from NDAT register. Each bit indicates status of each RX buffer. 1: Corresponding Rx buffer has CAN Frame. 0: Corresponding Rx buffer is empty.
  • FL: Indicates the CAN RXFIFO full flag status. 1: RXFIFO is full. 0: RXFIFO is not full.
  • F2, F1, F0: Indicates CAN RXFIFO fill level. 1: Corresponding Rx FIFO has CAN Frame. 0: Corresponding Rx FIFO is empty.
  • L2, L1, L0: Indicates LEC (Last Error Code) bits in CAN protocol.
    Table 2-5 Last Error Code (LEC) Bit Diagnostic Mapping
    LEC Bits [L2, L1, L0] Error code
    000 No Error
    001 Stuff Error
    010 Form Error
    011 Ack Error
    100 Bit1 Error
    101 Bit0 Error
    110 CRC Error
    111 No change
  • D2, D1, D0: Indicates DLEC (Data Phase Last Error Code) bits in CAN Protocol. Error codes are same as for LEC.
  • ES: Indicates Error status of previous instruction. 1: Error while receiving previous instruction. 0: No Error while receiving previous instruction.
  • TO: Timeout status of previous instruction. 1: Timeout occurred for previous instruction. 0: No Timeout occurred for previous instruction

Fetch Receive Status Data Instruction

MSPM0G3507 Fetch Receive Status Data Instruction Format Figure 2-18 Fetch Receive Status Data Instruction Format

Opcode: 0b0000000000001000

The Fetch RX Status Data Instruction is used to receive the RX Status data which has already been read and stored in a variable with Read RX Status data instruction.