SLAAEQ4 July   2025 MSPM0G1106 , MSPM0G1107 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1

 

  1.   1
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Features Supported
    2. 1.2 CAN Frame Format
    3. 1.3 SPI Message Frame Format
  4. 2Implementation
    1. 2.1 SPI Message Format
      1. 2.1.1 SPI Commands
      2. 2.1.2 Instruction Set
    2. 2.2 Timeout Feature
    3. 2.3 Error Indication
    4. 2.4 Busy Status Indication
    5. 2.5 Message RAM Configuration
    6. 2.6 Test Environment
  5. 3References

2.4 Busy Status Indication

The SPI-CAN bridge uses a GPIO pin to indicate busy status:

  1. The BUSY pin is asserted when:
    • An opcode is received from the SPI controller.
    • CAN network activity is in progress.
  2. The BUSY pin is cleared when:
    • The current instruction completes processing.
    • The CAN transfer finishes.

Important: The external SPI controller must not initiate new transactions while the BUSY pin is asserted. This prevents conflicts and maintains reliable data transfer.