SLOS970B January   2018  – January 2025 TPA6404-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Parameter measurement Information
  8. Detailed description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Differential Analog inputs
      2. 7.3.2 Gain Control and AC-Coupling
      3. 7.3.3 High-Frequency Pulse-Width Modulator (PWM)
      4. 7.3.4 Gate Drive
      5. 7.3.5 Power FETs
      6. 7.3.6 Load Diagnostics
        1. 7.3.6.1 DC Load Diagnostics
          1. 7.3.6.1.1 Automatic DC Load Diagnostics
          2. 7.3.6.1.2 I2C Controlled DC Load Diagnostics
        2. 7.3.6.2 Line Output Diagnostics
        3. 7.3.6.3 AC Load Diagnostics
          1. 7.3.6.3.1 Impedance Phase Reference Measurement
          2. 7.3.6.3.2 Impedance Phase Measurement
          3. 7.3.6.3.3 Impedance Magnitude Measurement
      7. 7.3.7 Protection and Monitoring
        1. 7.3.7.1 Over current Limit (ILIMIT)
        2. 7.3.7.2 Over current Shutdown (ISD)
        3. 7.3.7.3 DC Detect
        4. 7.3.7.4 Clip Detect
        5. 7.3.7.5 Global Over Temperature Warning (OTW), Over Temperature Shutdown (OTSD) and Thermal Foldback (TFB)
        6. 7.3.7.6 Channel Over Temperature Warning [OTW(i)] and Shutdown [OTSD(i)]
        7. 7.3.7.7 Thermal Foldback
        8. 7.3.7.8 Undervoltage (UV) and Power-On-Reset (POR)
        9. 7.3.7.9 Over Voltage (OV) and Load Dump
      8. 7.3.8 Power Supply
        1. 7.3.8.1 Power-Supply Sequence
      9. 7.3.9 Hardware Control Pins
        1. 7.3.9.1 FAULT
        2. 7.3.9.2 WARN
        3. 7.3.9.3 MUTE
        4. 7.3.9.4 STANDBY
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Modes and Faults
    5. 7.5 Programming
      1. 7.5.1 I2C Serial Communication Bus
      2. 7.5.2 I2C Bus Protocol
      3. 7.5.3 Random Write
      4. 7.5.4 Sequential Write
      5. 7.5.5 Random Read
      6. 7.5.6 Sequential Read
  9. Registers
    1. 8.1 Register Maps
      1. 8.1.1  Mode Control Register (address = 0x00) [default = 0x00]
      2. 8.1.2  Miscellaneous Control 1 Register (address = 0x01) [default = 0x32]
      3. 8.1.3  Miscellaneous Control 2 Register (address = 0x02) [default = 0x62]
      4. 8.1.4  Channel State Control Register (address = 0x04) [default = 0x55]
      5. 8.1.5  DC Load Diagnostic Control 1 Register (address = 0x09) [default = 0x00]
      6. 8.1.6  DC Load Diagnostic Control 2 Register (address = 0x0A) [default = 0x11]
      7. 8.1.7  DC Load Diagnostic Control 3 Register (address = 0x0B) [default = 0x11]
      8. 8.1.8  DC Load Diagnostic Report 1 Register (address = 0x0C) [default = 0x00]
      9. 8.1.9  DC Load Diagnostic Report 2 Register (address = 0x0D) [default = 0x00]
      10. 8.1.10 DC Load Diagnostics Report 3—Line Output—Register (address = 0x0E) [default = 0x00]
      11. 8.1.11 Channel State Reporting Register (address = 0x0F) [default = 0x55]
      12. 8.1.12 Channel Faults (Over current, DC Detection) Register (address = 0x10) [default = 0x00]
      13. 8.1.13 Global Faults 1 Register (address = 0x11) [default = 0x00]
      14. 8.1.14 Global Faults 2 Register (address = 0x12) [default = 0x00]
      15. 8.1.15 Warnings Register (address = 0x13) [default = 0x20]
      16. 8.1.16 Pin Control Register (address = 0x14) [default = 0x00]
      17. 8.1.17 AC Load Diagnostic Control 1 Register (address = 0x15) [default = 0x00]
      18. 8.1.18 AC Load Diagnostic Control 2 Register (address = 0x16) [default = 0x00]
      19. 8.1.19 AC Load Diagnostic Report Ch1 through CH4 Registers (address = 0x17–0x1A) [default = 0x00]
      20. 8.1.20 AC Load Diagnostic Report Phase High Register (address = 0x1B) [default = 0x00]
      21. 8.1.21 AC Load Diagnostic Report Phase Low Register (address = 0x1C) [default = 0x00]
      22. 8.1.22 AC Load Diagnostic Report STI High Register (address = 0x1D) [default = 0x00]
      23. 8.1.23 AC Load Diagnostic Report STI Low Register (address = 0x1E) [default = 0x00]
      24. 8.1.24 Miscellaneous Control 3 Register (address = 0x21) [default = 0x00]
      25. 8.1.25 Clip Control Register (address = 0x22) [default = 0x01]
      26. 8.1.26 Clip Warning Register (address = 0x24) [default = 0x00]
      27. 8.1.27 Current LIMIT Status Register (address = 0x25) [default = 0x00]
      28. 8.1.28 Fault and Warning Pin Control Register (address = 0x27) [default = 0x7F]
      29. 8.1.29 Thermal Foldback Control Register (address = 0x28) [default = 0x00]
      30. 8.1.30 AC Diagnostic Frequency Control Register (address = 0x2A) [default = 0x32]
      31. 8.1.31 SYNC PIN Control Register (address = 0x2B) [default = 0x02]
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 AM Radio Avoidance
      2. 9.1.2 Parallel BTL Operation (PBTL)
      3. 9.1.3 Reconstruction Filter Design
      4. 9.1.4 Line Driver Applications
    2. 9.2 Typical Applications
      1. 9.2.1 BTL Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Hardware Design
          2. 9.2.1.2.2 Bootstrap Capacitors
          3. 9.2.1.2.3 Output Reconstruction Filter
        3. 9.2.1.3 Application Curves
        4. 9.2.1.4 PBTL Application
          1. 9.2.1.4.1 Design Requirements
          2. 9.2.1.4.2 Detailed Design Procedure
            1. 9.2.1.4.2.1 Hardware Design
          3. 9.2.1.4.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Electrical Connection of Thermal pad and Heat Sink
        2. 9.4.1.2 EMI Considerations
        3. 9.4.1.3 General Considerations
      2. 9.4.2 Layout Example
      3. 9.4.3 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Electrostatic Discharge Caution
    4. 10.4 Glossary
    5. 10.5 Support Resources
    6. 10.6 Trademarks
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

AC Load Diagnostics

The AC load diagnostic is used to determine the proper connection of a capacitive coupled speaker or tweeter when used with a passive crossover. The AC load diagnostic is controlled through I2C. The TPA6404-Q1 provides a required signal source to determine the AC impedance and reports the approximate load impedance and phase to I2C registers. The I2C selected test frequency should create current flow through the desired speaker for proper detection. If multiple channels are to be tested, the diagnostics must be run in each channel separately as the results share the same I2C reporting register. When testing a channel multiple times, it is required to wait at least 200ms before rerunning AC load diagnostics on the same channel.

Note:

If an Undervoltage, Overvoltage or Overtemperature fault occurs during AC diagnostics, the AC diagnostics is stopped. AC Diagnostics will not be allowed to be performed again until the DC Diagnostics are performed. This is to ensure the fault is not potentially a hazard during AC diagnostics.

For load-impedance detection, there are three separate groups of processes that must be performed.

  • Impedance phase reference measurement
  • Impedance phase measurement of the load and calculation
  • Impedance magnitude measurement and calculation