SLUSFP1B April   2025  – November 2025 UCC34141-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Insulation Specifications
    6. 6.6 Electrical Characteristics
    7. 6.7 Safety-Related Certifications
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Stage Operation
        1. 7.3.1.1 VDD-COM Voltage Regulation
        2. 7.3.1.2 COM-VEE Voltage Regulation
        3. 7.3.1.3 COM-VEE Output Capability
      2. 7.3.2 Output Voltage Soft Start
      3. 7.3.3 ENA and Power-Good
      4. 7.3.4 Protection Functions
        1. 7.3.4.1 Input Undervoltage Lockout
        2. 7.3.4.2 Input Overvoltage Lockout
        3. 7.3.4.3 Output Undervoltage Protection
        4. 7.3.4.4 Output Overvoltage Protection
        5. 7.3.4.5 Over-Temperature Protection
        6. 7.3.4.6 BSW Pin Faults Protection
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD-COM Voltage Regulation
        2. 8.2.2.2 COM-VEE Voltage Regulation and Single Output Configuration
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information
    2. 11.2 Tape and Reel Information
    3. 11.3 Mechanical Data

6.6 Electrical Characteristics

Over operating temperature range (TJ = –40°C to 150°C), unless otherwise noted. All typical values at TA = 25°C and VVIN = 12V. External BOM components are listed in the pin description table.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT SUPPLY (Primary-side. All voltages with respect to GNDP)
VVIN Input voltage range Primary-side input voltage to GNDP. (VDD-COM)=18V; (COM-VEE)=4V; PVDD-COM = 0.3W; PCOM-VEE = 0; TA=85oC. 5.5(1) 12 20 V
VVIN Input voltage range Primary-side input voltage to GNDP. (VDD-COM)=18V; (COM-VEE)=4V; PVDD-COM = 1.3W; PCOM-VEE = 0; TA=85oC. 8(1) 12 18 V
IVINQ VIN quiescent current, disabled VENA = 0V; VVIN = 5.5V-20V;  600 µA
IVINP_NL VIN operating current, enabled, No Load VENA = 5V; VVIN = 12V; (VDD-COM) = 18V, (COM-VEE)=4V, regulating; IVDD-COM = ICOM-VEE = 0 mA.  12 mA
IVINP_FL VIN operating current, enabled, Full Load VENA = 5V; VVIN = 12V; (VDD-COM) = 18V, (COM-VEE)=4V, regulating; IVDD-COM = 83mA; ICOM-VEE =0  250 mA
UVLOP COMPARATOR (Primary-side. All voltages with respect to GNDP)
VVIN_UVLO_R VIN analog undervoltage lockout rising threshold Analog Comparator Always Active First 4 4.25 4.5 V
VVIN_ UVLO_F VIN analog undervoltage lockout falling threshold Analog Comparator Always Active First 3.8 4.04 4.28 V
OVLOP COMPARATOR (Primary-side. All voltages with respect to GNDP)
VVIN_OVLO_R VIN overvoltage lockout rising threshold 21.5 22 22.5 V
VVIN_OVLO_F VIN overvoltage lockout falling threshold 20 20.3 20.6 V
TSHUTP THERMAL SHUTDOWN COMPARATOR (Primary-side. All voltages with respect to GNDP)
TSHUT_P_R Primary-side over-temperature shutdown rising threshold 150 165 °C
TSHUT_P_HYST Primary-side over-temperature shutdown hysteresis 15 20 °C
ENA INPUT PIN (Primary-side. All voltages with respect to GNDP)
VENA_R Enable pin rising threshold Rising edge 1.425 1.5 1.575 V
VENA_F Enable pin falling threshold Falling edge 1.282 1.35 1.418 V
IENA Enable Pin Input Current VENA = 5.0V 5 10 µA
tENA_LO_RST Minimum period for EN = Low to reset latch off 400 µs
tENA_LO_DLY Minimum period required before EN = Low to reset latch off 200 µs
PG OPEN-DRAIN OUTPUT PIN (Primary-side. All voltages with respect to GNDP)
VPG_L PG output-low saturation voltage Sink Current = 5mA 0.5 V
IPG_H PG Leakage current VPG = 5.5V 5 µA
PRIMARY-SIDE SOFT START
tPG_Delay Deglitch time during soft start  between VDD reaches regulation and  Power-Good signal (PG) is issued. 2.7 3 3.3 ms
Primary-side Control (All voltages with respect to GNDP)
fSW Switching frequency VVIN = 12V; VENA = 5V; (VDD-COM)=18V, (COM-VEE)=4V 16.5 MHz
tSSTO Primary-side soft-start time-out Timer begins when VIN > UVLOP and ENA = High and reset when Power-Good pin indicates Good  32 ms
(VDD-COM) OUTPUT VOLTAGE (Secondary-side)
VVDD (VDD – COM) output voltage range 15 18 20 V
VVDD_REG (VDD – COM) output voltage DC regulation accuracy
Secondary-side (VDD – COM) output voltage accuracy at FBVDD, over load, line and temperature range, externally adjust with external resistor divider, within SOA range.
 		 -1.45 1.45 %
(VDD-COM) REGULATION HYSTERETIC COMPARATOR (Secondary-side)
VFBVDD_REF Feedback regulation reference voltage rising threshold for (VDD – COM) 2.473 2.51 2.547
VFBVDD_HYST (VDD-COM) hysteresis comparator hysteresis settings. Hysteresis at the FBVDD pin. The value represents peak-to-peak magnitude. 18 20 22 mV
(COM-VEE) REGULATION HYSTERETIC COMPARATOR (Secondary-side)
VFBVEE_HYST (COM-VEE) hysteresis comparator settings.
Hysteresis at the FBVEE pin. The value represents peak-to-peak magnitude.		 Hysteresis Setting 50 60 70 mV
(VDD-COM) UVLOs COMPARATOR (Secondary-side) 
VVDD_UVLOS_R (VDD – COM) undervoltage lockout rising threshold Voltage from VDD to COM, rising 3.2 3.45 3.7 V
VVDD_UVLOS_F (VDD – COM) undervoltage lockout falling threshold Voltage from VDD to COM, falling 3 3.25 3.5 V
(VDD-COM) OVLOs COMPARATOR (Secondary-side)
VVDD_OVLOS_R (VDD – COM) over-voltage lockout rising threshold Voltage from VDD to COM, rising 22.5 23 23.5 V
VVDD_OVLOS_F (VDD – COM) over-voltage lockout falling threshold Voltage from VDD to COM, falling 21.7 22.2 22.7 V
(VDD-COM) UVP, UNDER -VOLTAGE PROTECTION COMPARATOR (Secondary-side)
VVDD_UVP_R (VDD – COM) under-voltage protection rising threshold, VUVP = VREF × 90% At FBVDD 2.175 2.25 2.35 V
VVDD_UVP_HYST (VDD – COM) under-voltage protection hysteresis At FBVDD 22 mV
(VDD-COM) OVP, OVER-VOLTAGE PROTECTION COMPARATOR (Secondary-side)
VVDD_OVP_R (VDD – COM) over-voltage protection rising threshold, VOVP = VREF ×110% At FBVDD 2.7 2.75 2.825 V
VVDD_OVP_HYST (VDD – COM) over-voltage protection hysteresis At FBVDD 23 mV
(COM-VEE) Buck-Boost Converter (Secondary Side)
VVEE_REG (COM-VEE) regulation accuracy COM-VEE=2V, with 1% feedback resistance accuracy  7.5 %
COM-VEE=3V, 4V, 5V,  with 1% feedback resistance accuracy  4.5 %
COM-VEE=6V, 7V, 8V,  with 1% feedback resistance accuracy  6.5 %
VVEE_OVLOS_R (COM-VEE) over-voltage lockout rising threshold Voltage from COM to VEE, rising 8.8 9 9.2 V
VVEE_OVLOS_F (COM-VEE) over-voltage lockout falling threshold Voltage from COM to VEE, falling 8.4 8.6 8.8 V
fSW_VEE Switching frequency of VEE converter VDD-COM=18V, COM-VEE=4V, 3.3uH external inductor 3.2 MHz
ILIM Buck boost inductor current limit, out of BSW pin Max current limit without VDD feedforward 0.235 0.261 0.287 A
ILIM Buck boost inductor current limit, out of BSW pin VDD-COM=18V 0.127 0.141 0.155 A
tVEE_SSTO Timeout threshold to determine if the VEE soft start is succesful 1.3 1.6 2 ms
(COM-VEE) UVP, UNDER -VOLTAGE PROTECTION COMPARATOR (Secondary-side)
VVEE_UVP_F (COM – VEE) under-voltage protection falling threshold COM-VEE=2V 83 %
COM-VEE=5V 90 %
COM-VEE=8V 92 %
VVEE_UVP_HYST (COM – VEE) under-voltage protection hysteresis COM-VEE=5V 85 mV
(COM-VEE) OVP, OVER-VOLTAGE PROTECTION COMPARATOR (Secondary-side)
VVEE_OVP_R (COM – VEE) over-voltage protection rising threshold COM-VEE=2V 117 %
COM-VEE=5V 110 %
COM-VEE=8V 108 %
VVEE_OVP_HYST (COM – VEE) over-voltage protection hysteresis COM-VEE=5V 84 mV
TSHUTS THERMAL SHUTDOWN COMPARATOR (Secondary-side)
TSHUT_S_R Secondary -side over-temperature shutdown rising threshold 150 165 °C
TSHUT_S_HYST Secondary-side over-temperature shutdown hysteresis 15 20 °C
CMTI (Common Mode Transient Immunity)
CMTI Common Mode Transient Immunity Positive COM with respect to GNDP 250 V/ns
Negative COM with respect to GNDP -250 V/ns
INTEGRATED TRANSFORMER
N Transformer effective turns ratio Secondary side to primary side 2.43
(1) See the VVIN_UVLO_R and VVIN_ UVLO_F electrical characteristics for the miminum operational VVIN.