SLUUDD2 June   2026 TPS65214

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4Programming Instructions
    1. 4.1 Connecting to the I2C address
  8. 5Register Configuration
    1. 5.1  Configuring Enable Settings
    2. 5.2  Configuring the Bucks
    3. 5.3  Configuring LDOs
    4. 5.4  Configuring Sequence
    5. 5.5  Configuring GPIOs
    6. 5.6  Configuring Multi-Function Pins
    7. 5.7  Configuring the EN/PB/VSENSE Pin
    8. 5.8  Changing I2C Address
    9. 5.9  Configuring Mask Settings
    10. 5.10 Exporting an NVM Configuration File
    11. 5.11 Loading a NVM Configuration File to PMIC
  9. 6NVM Programming
  10. 7Non-NVM Registers
  11. 8TPS6521405 default settings
  12.   A References

1 Introduction

The configuration process to write to the NVM space is intended to be used in a production line or prototype board. The TPS65214 device has one time programmable (OTP) memory. After the device has been programmed once, the device cannot be reprogrammed again. Pre-configured NVMs that are programmed during manufacturing cannot be reprogrammed over.

The TPS6521405VAFR is an orderable part number, part of the TPS65214 family, created specifically to support custom NVM configuration. The -05 variant comes as a blank NVM with registers set to 00h, to be easily programmed over.

Figure 1-1 describes the supply options for pre-configured and custom NVMs based on volume. Design resources are available for pre-configured and high volume NVMs as well as low volume custom NVMs. These resources include application notes, user's guides, technical reference manuals, and NVM configuration files ready to be loaded into the PMIC NVM. Visit the TPS65214 product page on ti.com or use our PMIC TI E2E™ forum to ask about available resources.

Supply OptionsFigure 1-1 Supply Options