SLUUDD2 June   2026 TPS65214

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4Programming Instructions
    1. 4.1 Connecting to the I2C address
  8. 5Register Configuration
    1. 5.1  Configuring Enable Settings
    2. 5.2  Configuring the Bucks
    3. 5.3  Configuring LDOs
    4. 5.4  Configuring Sequence
    5. 5.5  Configuring GPIOs
    6. 5.6  Configuring Multi-Function Pins
    7. 5.7  Configuring the EN/PB/VSENSE Pin
    8. 5.8  Changing I2C Address
    9. 5.9  Configuring Mask Settings
    10. 5.10 Exporting an NVM Configuration File
    11. 5.11 Loading a NVM Configuration File to PMIC
  9. 6NVM Programming
  10. 7Non-NVM Registers
  11. 8TPS6521405 default settings
  12.   A References

5.5 Configuring GPIOs

GPIOs can be used to enable external discrete components. GPIO can also be used for multi-PMIC configuration to sync the power-up and power-down sequence between two TPS65214 devices.

  • Figure 5-4 shows the settings to be changed when using the configuration tab of the TPS65214-GUI.

GPIOs ConfigurationFigure 5-4 GPIOs Configuration

Table 5-11 NVM Registers for GPIO Enable Settings
Register AddressBitSettings
Bit #Field Name
Enable settings in Active state0x1E2GPIO_EN0h = Disabled. The output state is low.

1h = Enabled. The output state is Hi-Z.

0GPO_EN0h = Disabled. The output state is low.

1h = Enabled. The output state is Hi-Z.

Enable settings in Standby state0x222GPIO_STBY_EN0h = Disabled. The output state is low.

1h = Enabled. The output state is Hi-Z.

0GPO_STBY_EN0h = Disabled. The output state is low.

1h = Enabled. The output state is Hi-Z.

Table 5-12 NVM Register for GPIO Configuration
Register AddressBitSettings
Bit #Field Name
GPIO/VSEL configuration0x1E

1

GPIO_CONFIG0h = Configured as an Input

1h = Configured as an Output

0x1F

3

GPIO_VSEL_CONFIG

0h = Configured as GPIO

1h = Configured as VSEL