SLUUDD2 June   2026

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4Programming Instructions
    1. 4.1 Connecting to the I2C address
  8. 5Register Configuration
    1. 5.1  Configuring Enable Settings
    2. 5.2  Configuring the Bucks
    3. 5.3  Configuring LDOs
    4. 5.4  Configuring Sequence
    5. 5.5  Configuring GPIOs
    6. 5.6  Configuring Multi-Function Pins
    7. 5.7  Configuring the EN/PB/VSENSE Pin
    8. 5.8  Changing I2C Address
    9. 5.9  Configuring Mask Settings
    10. 5.10 Exporting an NVM Configuration File
    11. 5.11 Loading a NVM Configuration File to PMIC
  9. 6NVM Programming
  10. 7Non-NVM Registers
  11. 8TPS6521405 default settings
  12.   A References

5.7 Configuring the EN/PB/VSENSE Pin

The enable pin of the PMIC can be configured as Enable, Push-Button, or VSENSE. In addition to the function, the deglitch can also be configured. Additionally, this pin has the option for first supply detection (FSD) to ignore the state of the EN/PB/VSENSE pin during the first power-up.

  • Figure 5-6 shows the settings to be changed when using the configuration tab of the TPS65214-GUI.

  • Table 5-16 show the register fields to be written when referring to the register map.

EN/PB/VSENSE Configuration Using the TPS65214-GUIFigure 5-6 EN/PB/VSENSE Configuration Using the TPS65214-GUI
Table 5-16 NVM Registers for EN / PB / VSENSE
Register AddressBitSettings
Bit #Field Name
First Supply Detection0x207PU_ON_FSD0h = FSD Disabled

1h = FSD Enabled

Pin Configuration5-4EN_PB_VSENSE_CONFIG0h = Enable

1h = Push Button

2h = VSENSE

3h = Enable

Deglitch

Time

3EN_PB_VSENSE_DEGLsee register map on data sheet