SLVAFW0 December   2025 TPS61381-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2TPS61381-Q1 Schematic Guideline
    1. 2.1 GND Connection
    2. 2.2 Driver Design
    3. 2.3 IO Configuration
    4. 2.4 Output Capacitor
    5. 2.5 Compensation Design
      1. 2.5.1 Small Signal Analysis
      2. 2.5.2 Step by Step Loop Compensation Design
  6. 3TPS61381-Q1 Layout Guide Line
    1. 3.1 Identification of the Critical Switching Loops
      1. 3.1.1 Low Side Driver Loop
      2. 3.1.2 Boost Leg Switching Loop
      3. 3.1.3 High Side Driver Loop
    2. 3.2 Power Component Placement
    3. 3.3 Layout Example
      1. 3.3.1 Optimizing Low Side Driver Loop Example
      2. 3.3.2 Optimizing Boost Leg Switching Loop Example
      3. 3.3.3 Optimizing High Side Driver Loop Example
      4. 3.3.4 Signal Circuit Routing Example
  7. 4Summary
  8. 5References

3.3.2 Optimizing Boost Leg Switching Loop Example

Figure 3-6 shows an example of a boost leg switching loop. To reduce the length of this current path, MLCC must be placed as close to Vout pin as possible (within 1mm) and the low side MOSFET Q1 must be placed as close to SW pin as possible. TI also recommends a smaller Cout (100nF-1uF, 0603 package) closest to the Vout pin to bypass the high frequency noise.

TPS61381-Q1 Boost Leg Switching Loop Layout Example Figure 3-6 TPS61381-Q1 Boost Leg Switching Loop Layout Example