With the previous analysis on small signal models, we can calculate the compensation network parameters with the given inductor and output capacitor parameters. TI provides EXCEL calculation tools on designing compensation parameters. This section gives an example on calculating loop compensation with the design calculation tool.

1. Set the Crossover Frequency, ƒ_C.

   The first step is to set the loop crossover frequency, ƒ_C. The higher the crossover frequency, the faster the loop response is. This is generally accepted that the loop gain crosses over no higher than the lower of either 1/10 of the switching frequency, ƒ_SW, or 1/5 of the RHPZ frequency, ƒ_zRHP.

2. Set the Compensation Resistance, R_COMP.

   For a well compensated boost system, the f_C is determined by R_COMP.Set your desired f_C and the calculation tool can output recommended R_COMP.

   Figure 2-7 Set the Compensation Resistance

   The calculation tool recommends the Rout under these assumptions: For a properly designed boost system, ƒ_zCOMP must be placed below ƒ_C to make sure of phase margin. For common R_COMP range, R_COMP must be far smaller than the amplifier output resistance R_EA, which makes R_COMP | | R_EA ~ = R_COMP. Therefore, looking at Equation 6, the initial gain R_COMP × G_COMP × K_FB is determined by R_COMP. Therefore the f_c can be calculated by the equation that the close loop total gain T_(s) = K_PS(s) + H_COMP(s) is zero at ƒ_C.

   Equation 10. $H_{COMP}=20lg\left(G_{COMP}\times R_{COMP}\times \frac{R_{down}}{R_{up}+R_{down}}\right)=-K_{PS}\left(f_c\right)$

   where

   • K_PS is the gain of the power stage
   • G_EA is the transconductance of the amplifier, the typical value of G_EA = 24µS
3. Set the Compensation Zero capacitor, C_COMP.

   The compensation zero needs to be placed at the power stage pole f_pPS to compensate the phase drop near f_pPS. Set ƒ_Z = ƒ_P, the C_COMP can be calculated . The calculation tool outputs the recommended C_COMP when the actual R_COMP is entered in line 80.

   Equation 11. $C_{COMP}=\frac{R_{out}\times C_{out}}{2R_{COMP}}$
   Figure 2-8 Set the Compensation Capacitance
4. Set the Compensation Pole Capacitor, C_HF.

   The compensation pole needs to be placed to eliminate the ESR zero produced by R_ESR and C_out. Set ƒ_pCOMP2 = ƒ_zESR, and get:

   Equation 12. $C_{HF}=\frac{R_{ESR}\times C_{out}}{R_{COMP}}$

   The recommended C_HF is located at the calculation tool line 84 after the ESR and Cout is correctly entered in line 15-16.

   Figure 2-9 Set the Compensation Capacitance
5. Check Phase Margin and Gain Margin

   The calculated compensation parameters do not always make sure of stability, especially when the Cout has large ESR which bring f_zESR into bandwidth. The calculation tool generates bode plot after all compensation parameters are entered. Check the bode plot for stability after steps 1-4. TI recommends phase margin > 60deg and gain margin > 10db. Reduce desired f_c and re-calculate compensation in steps 1-4 if the margin does not meet requirements.

   Figure 2-10 Evaluate Loop Stability