SLVS348N July   2001  – January 2025 TPS793

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Shutdown
      3. 6.3.3 Active Discharge (new chip)
      4. 6.3.4 Foldback Current Limit
      5. 6.3.5 Thermal Protection
      6. 6.3.6 Reverse Current
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Operation
      2. 7.1.2 Exiting Dropout
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Capacitor Recommendations
        2. 7.2.2.2 Input and Output Capacitor Requirements
        3. 7.2.2.3 Noise Reduction and Feed-Forward Capacitor Requirements
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
        2. 7.5.1.2 Power Dissipation
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2.2.2 Input and Output Capacitor Requirements

A 0.1μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the legacy chip of TPS793, is required for stability and improves transient response, noise rejection, and ripple rejection. A 1μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the new chip of TPS793, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value input capacitor can be necessary if large, fast-rise-time load transients are anticipated or the device is located several inches from the power source.

Like most low-dropout regulators, the TPS793 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 2.2μF. Any 2.2μF or larger ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load current is not expected to exceed 100 mA, a 1.0-μF ceramic capacitor can be used. If a feed-forward capacitor is not used (such as in a unity-gain configuration) or if an output voltage less than 1.8 V is chosen, then the minimum recommended output capacitor is 4.7μF instead of 2.2μF. Table 7-2 lists the recommended output capacitor sizes for several common configurations.

Table 7-2 Output Capacitor Sizing
ConditionCOUT (µF)
VOUT < 1.8 V or CFF = 0 nF4.7
VOUT > 1.8 V, IOUT > 100 mA2.2
VOUT > 1.8 V, IOUT < 100 mA1