Product details


Output options Adjustable Output, Fixed Output Iout (Max) (A) 0.2 Vin (Max) (V) 5.5 Vin (Min) (V) 2.7 Vout (Max) (V) 5.4 Vout (Min) (V) 1.22 Fixed output options (V) 1.8, 2.5, 2.8, 2.85, 3, 3.3, 4.75 Noise (uVrms) 32 Iq (Typ) (mA) 0.17 Thermal resistance θJA (°C/W) 178 Load capacitance (Min) (µF) 2.2 Rating Catalog Regulated outputs (#) 1 Features Enable Accuracy (%) 2 PSRR @ 100 KHz (dB) 44 Dropout voltage (Vdo) (Typ) (mV) 112 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

DSBGA (YZQ) 5 SOT-23 (DBV) 6 5 mm² 2.9 x 1.6 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 open-in-new Find other Linear regulators (LDO)


  • 200-mA RF Low-Dropout Regulator
    With Enable
  • Available in Fixed-Voltage Versions from 1.8 V to
    4.75 V and Adjustable (1.22 V to 5.5 V)
  • High PSRR (70 dB at 10 kHz)
  • Low Noise (32 µVRMS, TPS79328)
  • Fast Start-Up Time (50 µs)
  • Stable With a 2.2-µF Ceramic Capacitor
  • Excellent Load and Line Transient Response
  • Very Low Dropout Voltage (112 mV at 200 mA,
  • 5- and 6-Pin SOT23 (DBV) and NanoStar Wafer
    Chip Scale (YZQ) Packages
open-in-new Find other Linear regulators (LDO)


The TPS793 family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), ultralow-noise, fast start-up, and excellent line and load transient responses in NanoStar™ wafer chip scale and SOT23 packages. NanoStar packaging gives an ultrasmall footprint as well as an ultralow profile and package weight, making these devices ideal for portable applications such as handsets and PDAs. Each device in the family is stable, with a small, 2.2-µF ceramic capacitor on the output. The TPS793 family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (for example, 112 mV at 200 mA, TPS79330). Each device achieves fast start-up times (approximately 50 µs with a 0.001-µF bypass capacitor) while consuming very low quiescent current (170 µA typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 µA. The TPS79328 exhibits approximately 32 µVRMS of output voltage noise at 2.8-V output with a 0.1-µF bypass capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time.

open-in-new Find other Linear regulators (LDO)
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Same functionality and pinout but is not an equivalent to the compared device:
NEW TPS784 ACTIVE 300-mA, low-IQ, high-PSRR, low-dropout (LDO) voltage regulator with high accuracy and enable High-accuracy (0.5% typical), 25-uA IQ, adjustable-output LDO in SOT-23 package
NEW TPS7A20 ACTIVE 300-mA, ultra-low-noise, low-IQ, low-dropout (LDO) linear regulator with high PSRR P2P in SOT-23 & 80% smaller in WCSP, much lower IQ, much lower noise, improved PSRR, reduced in-rush current, wider VIN Range
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
TLV705 ACTIVE 200-mA, high-PSRR, low-IQ, low-dropout voltage regulator with low-noise & enable 56% smaller WCSP package, lower VIN range, lower cost, improved noise, improved PSRR>10 Hz, lower IQ
TPS7A90 ACTIVE 500-mA, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy Much lower noise, improved PSRR>30 kHz, much better thermal dissipation, higher current, wider VIN range

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 9
Type Title Date
* Datasheet TPS793 Low-Noise, High PSRR, RF, 200-mA Low-Dropout Linear Regulators in NanoStar™ Wafer Chip Scale and SOT-23 datasheet (Rev. L) Aug. 07, 2014
* Radiation & reliability report TPS793285YEQ Reliability Report Oct. 10, 2003
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Technical articles LDO basics: noise – part 1 Jun. 14, 2017
Application note Cyclone™ III FPGA Starter Kit Power Reference Design Mar. 27, 2008
User guide DEM-SOT23LDO Demonstration Fixture User's Guide (Rev. A) Jun. 02, 2005
Application note NanoStar™ Wafer Chip-Scale Package Design Guide Sep. 05, 2003

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development


The TMS320DM36x Digital Video Evaluation Module (DVEVM) enables developers to start immediate evaluation of TI’s Digital Media (DMx) processors and begin building digital video applications such as IP security cameras, action cameras, drones, wearables, digital signage, video doorbells, and (...)

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  • Parallel Camera Input compatible with Leopard Imaging LI-5M02 camera board
  • Video capture of NTSC or PAL signals via component for HD and composite/S-Video for SD
  • NTSC or PAL output via component for HD and composite/S-Video for SD
  • Other (...)

The purpose of this EVM is to facilitate evaluation of the TPS793xx family of LDO regulators. Each EVM package contains one SLVP191 test board, with either a TPS79301DBV linear regulator or a TPS79328DBV linear regulator, as well as supporting passive components. The TPS79301DBV adjustable device (...)

Design tools & simulation

SGLM012.ZIP (28 KB) - PSpice Model
SGLM013.ZIP (21 KB) - PSpice Model
SGLM014.ZIP (21 KB) - PSpice Model
SGLM015.ZIP (21 KB) - PSpice Model
SGLM016.ZIP (21 KB) - PSpice Model
SGLM017.ZIP (21 KB) - PSpice Model
SGLM018.ZIP (21 KB) - PSpice Model
SLVMA75.ZIP (35 KB) - PSpice Model

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50-Ohm 2-GHz Oscilloscope Front-end Reference Design
TIDA-00826 This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
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RF Layout Reference Design for 420-470 MHz (CC1200 and CC1201)
CC120XEM-420-470-RD This RF Layout Reference Design demonstrates good decoupling and layout techniques for a low power RF device operating in the 420-470 MHz frequency band.
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RF Layout Reference Design for 868-930 MHz (CC1200 and CC1201)
CC120XEM-868-930-RD This RF Layout Reference Design demonstrates good decoupling and layout techniques for a low power RF device operating in the 868 MHz and 915 MHz frequency bands.
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Altera Cyclone III FPGA Power Management Reference Design
PMP2543 The Cyclone III power management design is a complete, non-isolated power solution and provides all 5 required rails for powering the FPGA. The design also includes complete power solutions for DDR Memory VTT and VDDQ rails and USB power. This design is optimized to power the Altera 3C25F324 starter (...)
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Design files

CAD/CAE symbols

Package Pins Download
DSBGA (YZQ) 5 View options
SOT-23 (DBV) 6 View options
SOT-23 (DBV) 5 View options

Ordering & quality

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  • MSL rating/Peak reflow
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  • Ongoing reliability monitoring

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