SLVSGS5A December 2023 – June 2024 DRV3946-Q1
PRODUCTION DATA
This section describes the various device protection and diagnostic functions including the configuration options, response options, and recovery options. Detailed safety mechanism (SM) descriptions, classifications, and detection coverage can be found in the device safety manual.
| Fault Event | Safety Mechanism | Device State | CONFIG | nFAULT Assertion | SPI Indication | Driver function | Reaction | Recovery |
SPI Watchdog Violation | SM_SPI_WD | Standby, Active | SPI_WD_DIS = 1 | No | None | None | None | None |
Standby | SPI_WD_DIS = 0 | Yes if nFAULT_CONFIG[1] = 1 | SPI_WD_W | None | None | CLR FAULT command | ||
Active | SPI_WD_DIS = 0, SPI_WD_SHUTOFF_EN= 0 | Yes if nFAULT_CONFIG[1] = 1 | SPI_WD_W | None | None | CLR FAULT command | ||
Active | SPI_WD_DIS = 0, SPI_WD_SHUTOFF_EN= 1 | Yes if nFAULT_CONFIG[1] = 1 or nFAULT_CONFIG[3] = 1 | SPI_WD_W, CHx_STAT | Both outputs Hi-Z | None | CLR FAULT command. Driver is activated without CLR FAULT on changing SPI_WD_SHUTOFF_EN from 1 to 0, nFAULT remains low till CLR FAULT | ||
VDD under voltage | SM_VDD_UV | Standby, Active | None | No | VDD_ERR on SDO | None | SDI is still valid | Auto recovery |
VDD over voltage | SM_VDD_OV | Standby | None | No | VDD_ERR on SDO | None | SDI is still valid | Auto recovery |
Active | VDD_OV_SHUTOFF_EN = 0 | No | VDD_ERR on SDO | None | SDI is still valid | Auto recovery | ||
Active | VDD_OV_SHUTOFF_EN = 1 | Yes if nFAULT_CONFIG[3] = 1 | VDD_ERR on SDOx, CHx_STAT (after VDD recovery) | Both outputs Hi-Z | SDI is still valid | CLR FAULT command | ||
Indeterminate node address due to NAD resistance out of range | SM_NAD_MON | INIT2 | None | No | NAD_ERR on SDO | None | None | RE_INIT_NAD,NAD_OVERRIDE broadcast command. Connect proper NAD resistor and then issue RE_INIT_NAD command. |
Indeterminate node address due to SDO conflict detection | SM_NAD_MON | Standby | None | No | NAD_ERR on SDO | None | None | RE_INIT_NAD,NAD_OVERRIDE broadcast command |
Active | None | No | NAD_ERR on SDO | None | None | RE_INIT_NAD,NAD_OVERRIDE broadcast command. From INIT2 state, device goes to active state without clear fault. | ||
SPI Command CRC violation or incorrect frame length | SM_SPI_CMD_CRC, SM_SPI_ERR | Standby, Active | None | No | SPI_ERR | None | Ignored SPI frame | Proper write/read command |
CRC violation of CONFIG registers | SM_CONFIG_CRC | Except INIT1 | None | No | CONFIG_x_CRC_W | None | Register updates accepted | Write to checksum register with proper CRC |
Power on reset | SM_V5_S_POR | Standby, Active | None | No | POR, CONFIG_x_CRC_W | Both outputs Hi-Z | None | CLR FAULT command |
IPROPI resistor range violation | SM_IPROPI_MON | INIT2 | None | No | CHx_RIPROPI_W | None | None | Make RIPROPI_W_BYPASS bit 1b, then CLR FAULT command |
Off-state load impedance check | SM_OLP_MON | Standby | CHx_OLP_DIS = 0 | Yes if nFAULT_CONFIG[3] = 1 | CHx_OFF_DIAG_STAT | None | None | CLR FAULT command |
Standby | CHx_OLP_DIS = 1 | No | None | None | None | None | ||
Minimum peak ramp time violation | None | Active | PC_DIS = 0, PRT_MIN_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PRT_W | None | None | CLR FAULT command |
Active | PC_DIS = 0, PRT_MIN_W_DIS = 1 | No | None | None | None | None | ||
Maximum peak ramp time violation | None | Active | PC_DIS = 0, PRT_MAX_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PRT_W | None | Device goes to next state after timeout. CHx_PRT register reads PT time. | CLR FAULT command |
Active | PC_DIS = 0, PRT_MAX_W_DIS = 1 | No | None | None | None | None | ||
Minimum hold ramp time violation | None | Active | HRT_MIN_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_HRT_W | None | None | CLR FAULT command |
Active | HRT_MIN_W_DIS = 1 | No | None | None | None | None | ||
Maximum hold ramp time violation | None | Active | HRT_MAX_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_HRT_W | None | Device goes to next state after timeout. CHx_HRT register reads maximum HRT threshold time. | CLR FAULT command |
Active | HRT_MAX_W_DIS = 1 | No | None | None | None | None | ||
Minimum QTO time violation | SM_MIN_QTO_MON | Active | QTOT_MIN_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_QTOT_W | None | None | CLR FAULT command |
Active | QTOT_MIN_W_DIS = 1 | No | None | None | None | None | ||
Maximum QTO time violation | SM_MAX_QTO_MON | Active | QTOT_MAX_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_QTOT_W | None | Device goes to next state after timeout. CHx_QTOT register reads maximum QTOT threshold time. | CLR FAULT command |
Active | QTOT_MAX_W_DIS = 1 | No | None | None | None | None | ||
Maximum QTO start time violation | None | Active | None | No | None | None | Device goes to next state after timeout. CHx_QTOST register reads maximum QTOST time. | None |
Ripple - Low threshold violation | SM_RIPPLE_MON_L | Active | RIPPLE_L_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PC_RIPPLE_LOW_W CHx_HC_RIPPLE_LOW_W | None | None | CLR FAULT command |
Active | RIPPLE_L_W_DIS = 1 or PC_PWM_W_DIS = 1 (peak regulation) | No | None | None | None | None | ||
Ripple - High threshold violation | SM_RIPPLE_MON_H | Active | RIPPLE_H_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PC_RIPPLE_HIGH_W CHx_HC_RIPPLE_HIGH_W | None | None | CLR FAULT command |
Active | RIPPLE_H_W_DIS = 1 or PC_PWM_W_DIS = 1 (peak regulation) | No | None | None | None | None | ||
Time out - HS SNS OK not registered before end of PWM period | SM_HS_SNS_OK | Active | HS_SNS_TO_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PC_HS_SNS_TO_W CHx_HC_HS_SNS_TO_W | None | None | CLR FAULT command |
Active | HS_SNS_TO_DIS = 1 or PC_PWM_W_DIS = 1 (peak regulation) | No | None | None | None | None | ||
| Time out - LS SNS OK not registered before end of PWM period | SM_LS_SNS_OK | Active | LS_SNS_TO_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PC_LS_SNS_TO_W CHx_HC_LS_SNS_TO_W | None | None | CLR FAULT command |
Active | LS_SNS_TO_DIS = 1 or PC_PWM_W_DIS = 1 (peak regulation) | No | None | None | None | None | ||
Current less than target current though LS ON 100% | None | Active | LOW_CUR_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PC_LOW_CURR_W CHx_HC_LOW_CURR_W | None | None | CLR FAULT command |
Active | LOW_CUR_W_DIS = 1 or PC_PWM_W_DIS=1 (peak regulation) | No | None | None | None | None | ||
Cycle Skipping due to HS SNS current > target at start of PWM cycle | None | Active | CYCLE_SKIP_W_DIS = 0 | Yes if nFAULT_CONFIG[0] = 1 | CHx_PC_CYCLE_SKIP_W CHx_HC_CYCLE_SKIP_W | None | None | CLR FAULT command |
| Active | PWM_CYCLE_SKIP_DIS = 1 | No | None | None | None | None | ||
Active | CYCLE_SKIP_W_DIS = 1 or PC_PWM_W_DIS=1 (peak regulation) | No | None | None | None | None | ||
PVDD under voltage - warning level | SM_PVDD_UV | Standby | PVDD_UV_W_DIS = 0 | Yes if nFAULT_CONFIG[2] = 1 | PVDD_UV | None | None | CLR FAULT command |
Standby | PVDD_UV_W_DIS = 1 | No | None | None | None | None | ||
Active | PVDD_UV_W_DIS = 0 | Yes if nFAULT_CONFIG[2] = 1 | PVDD_UV | Fixed duty regulation | None | CLR FAULT command | ||
Active | PVDD_UV_W_DIS = 1 | No | None | Fixed duty regulation | None | None | ||
PVDD under voltage | SM_PVDD_UV | Standby | None | Yes if nFAULT_CONFIG[2] = 1 | PVDD_UV | None | None | CLR FAULT command |
SM_PVDD_UV | INIT1, INIT2 | None | No | SDO VDD_ERR | None | None | None | |
SM_PVDD_UV_QTO | Active | None | Yes if nFAULT_CONFIG[2] = 1 or nFAULT_CONFIG[3] = 1 | CHx_STAT, PVDD_UV | Both outputs Hi-Z | None | CLR FAULT command | |
PVDD over voltage - warning level | SM_PVDD_OV | Standby, Active | PVDD_OV_W_DIS = 0 | Yes if nFAULT_CONFIG[2] = 1 | PVDD_OV | None | tOCP forced to lower setting | CLR FAULT command |
Standby, Active | PVDD_OV_W_DIS = 1 | No | None | None | None | None | ||
PVDD over voltage - shutdown level | SM_PVDD_OV | Standby | NA | Yes if nFAULT_CONFIG[2] = 1 | PVDD_OV | None | None | CLR FAULT command |
INIT1, INIT2 | None | No | SDO VDD_ERR | None | None | None | ||
Active | PVDD_OV_SHUTOFF_EN = 0 | Yes if nFAULT_CONFIG[2] = 1 | PVDD_OV | None | None | CLR FAULT command | ||
Active | PVDD_OV_SHUTOFF_EN = 1 | Yes if nFAULT_CONFIG[2] = 1 or nFAULT_CONFIG[3] = 1 | PVDD_OV, CHx_STAT | Both outputs Hi-Z | Low-side clamp for QTO | CLR FAULT command | ||
Over Current violation on Output x LS path (OCP_LS) | SM_LS_OCP | Active (LSON) | None | Yes if nFAULT_CONFIG[3] = 1 | CHx_STAT | Affected output Hi-Z | None | CLR FAULT command |
Over Current violation on Output x HS path (OCP_HS) | SM_HS_OCP | Active (RECIRC) | None | Yes if nFAULT_CONFIG[3] = 1 | CHx_STAT | Affected output Hi-Z | None | CLR FAULT command |
Under current violation (UCLO) | SM_UCLO | Active (LSON) | UCLO_EN = 0 | No | CHx_UCLO_W | None | None | CLR FAULT command |
Active (LSON) | UCLO_EN = 1 | Yes if nFAULT_CONFIG[3] = 1 | CHx_STAT, CHx_UCLO_W | Affected output Hi-Z | None | CLR FAULT command | ||
Over Temperature violation (TSD) | SM_TSD | Active | None | Yes if nFAULT_CONFIG[2] = 1 or nFAULT_CONFIG[3] = 1 | CHx_STAT, OT | Both outputs Hi-Z | None | CLR FAULT command |
Over Temperature warning (OTW) | SM_OTW | Standby, Active | OT_W_DIS = 0 | Yes if nFAULT_CONFIG[2] = 1 | OT | None | Switch to highest SR, if OT_W_ACTION = 1 | CLR FAULT command |
Standby, Active | OT_W_DIS = 1 | No | None | None | None | None | ||
| Safety layer - V5_S UV or OV | SM_V5_S_UV, SM_V5_S_OV | Standby, Active | None | Yes | SDO Hi-Z, DEV_ERR set, but cannot be read | Both outputs Hi-Z | Secondary logic timeout | Power cycle |
| Safety layer - fOSC violation (high or low or stuck) | SM_OSC_MON | Standby, Active, INIT1, INIT2 | None | Yes | SDO Hi-Z, DEV_ERR set, but cannot be read | Both outputs Hi-Z | Secondary logic timeout | Power cycle |
| Safety layer - Digital BIST failure | SM_LOGIC_BIST | INIT1 | None | Yes | SDO Hi-Z, DEV_ERR set, but cannot be read | Both outputs Hi-Z | Secondary logic timeout | Power cycle |
| Safety layer - Memory BIST failure | SM_MEM_BIST | INIT1 | None | Yes | SDO Hi-Z, DEV_ERR set, but cannot be read | Both outputs Hi-Z | Register updates accepted in TI factory test mode | Power cycle |
| Analog power-up BIST failure | SM_ABIST | INIT2 | None | No | STARTUP_BIST_W | None | None | CLR FAULT command |
| PWM BIST violation | SM_PWM_BIST | Active | None | Yes if nFAULT_CONFIG[0] = 1 | CHx_PC_PWM_BIST_W, CHx_HC_PWM_BIST_W | None | None | CLR FAULT command |