SLVUD17B February 2025 – November 2025 TPS65214
TPS65214 has three multifunctional pins that can be configured depending on the functional use. Table 2-2 shows the functions available for each of these pins as well as how these functions are configured and operated.
| Pin Name | Pin Configuration | Operation |
|---|---|---|
| GPIO/VSEL | GPIO Configurable as an input or an output through the GPIO_CONFIG bit in the GENERAL_CONFIG register. |
For detailed operation, see GPIO/VSEL configured as GPIO section in the TPS65214 Integrated Power Management IC for ARM Cortex Processors data sheet. |
| VSEL The pin level is used to set the output voltage of Buck1 or Buck3 through the VSEL_RAIL bit in the MFP_1_CONFIG register. |
For detailed operation, see GPIO/VSEL configured as 'VSEL' section in the TPS65214 Integrated Power Management IC for ARM Cortex Processors data sheet. | |
| MODE/STBY | MODE Forces buck converters into PWM or permits auto-entry in PFM-mode. |
Pin status determines the switching mode of the buck converters. |
| STBY Sets device in low power mode. |
Disables selected rails. Assert pin low for longer than tDEGLITCH_MFP. Both MODE and STBY can be combined. Level sensitive. | |
| GPO/nWAKEUP |
GPO General purpose output used to sequence external rails |
Configurable power-up and power-down sequence or controlled through GPO_EN bit in the GENERAL_CONFIG register. |
|
nWAKEUP Signal to the host to indicate a power-on event. |
Pin held low until device exits the INITIALIZE state. Polarity is not configurable. |