SLVUD67 September   2025 TPS6521505-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4TPS65215 with TPS65219EVM
  8. 5Programming Instructions
    1. 5.1  Configuring Enable Settings
    2. 5.2  Configuring the Bucks
    3. 5.3  Configuring LDOs
    4. 5.4  Configuring GPIOs
    5. 5.5  Configuring Sequence
    6. 5.6  Configuring Multi-Function Pins
    7. 5.7  Configuring the EN/PB/VSENSE Pin
    8. 5.8  Changing I2C Address
    9. 5.9  Configuring Mask Settings
    10. 5.10 NVM Re-Programming
  9.   A Non-NVM Registers
  10.   B Loading a NVM Configuration File to PMIC
  11.   C PMIC Configurable Fields
  12.   References
  13.   E Revision History

5.2 Configuring the Bucks

There are several settings that can be programmed for the Buck converters. These include the output voltages, under voltage (UV) monitoring, and bandwidth among others.

Bucks Settings Using the TPS65215-GUI Figure 5-3 Bucks Settings Using the TPS65215-GUI
Table 5-2 NVM Registers for Buck1 Configuration
Register Address Bit Field Name Settings
Bandwidth 0x0A 7 BUCK1_BW_SEL 0h = low bandwidth
1h = high bandwidth
UV monitoring 6 BUCK1_UV_THR_SEL 0h = -5% UV detection level
1h = -10% UV detection level
Output Voltage 5-0 BUCK1_VSET For more information, see the Register Map in the device-specific data sheet.
Table 5-3 NVM Registers for Buck2 Configuration
Register Address Bit Field Name Settings
Bandwidth 0x09 7 BUCK2_BW_SEL 0h = low bandwidth
1h = high bandwidth
UV monitoring 6 BUCK2_UV_THR_SEL 0h = -5% UV detection level
1h = -10% UV detection level
Output Voltage 5-0 BUCK2_VSET For more information, see the Register Map in the device-specific data sheet.
Table 5-4 NVM Registers for Buck3 Configuration
Register Address Bit Field Name Settings
Bandwidth 0x08 7 BUCK3_BW_SEL 0h = low bandwidth
1h = high bandwidth
UV monitoring 6 BUCK3_UV_THR_SEL 0h = -5% UV detection level
1h = -10% UV detection level
Output Voltage 5-0 BUCK3_VSET For more information, see the Register Map in the device-specific data sheet.
Table 5-5 NVM Registers for Switching Mode (Only Applicable if BUCK_FF_ENABLE = 1h)
Register Address Bit Field Name Settings
Spread Spectrum 0x03 5 BUCK_SS_ENABLE 0h = Spread spectrum disabled
1h = Spread spectrum enabled
Switching Mode 4 BUCK_FF_ENABLE DO NOT CHANGE THIS BIT
Buck2/Buck3 phase config 3-2 BUCK3_PHASE_CONFIG 0h = 0 degrees

1h = 90 degrees

2h = 180 degrees

3h = 270 degrees

1-0 BUCK2_PHASE_CONFIG 0h = 0 degrees

1h = 90 degrees

2h = 180 degrees

3h = 270 degrees