SLVUDA2 July   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8.   General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  9. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Test Points
    3. 2.3 Setup
      1. 2.3.1 Reference Voltage
        1. 2.3.1.1 Configuration 1: REFA and REFB = GND
        2. 2.3.1.2 Configuration 2: OPA CH A Bias REFA and REFB
        3. 2.3.1.3 Configuration 3: REFA and REFB Bias Independently
      2. 2.3.2 Current Sensing
      3. 2.3.3 Input Filtering
      4. 2.3.4 Output Load
    4. 2.4 Best Practices
  10. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  11. 4Additional Information
    1. 4.1 Trademarks
    2. 4.2 Related Documentation

2.3.1.2 Configuration 2: OPA CH A Bias REFA and REFB

Figure 2-6 shows circuit for Configuration 2 and Table 2-5 outlines the header pin settings.

This use case sets the reference voltage to mid-supply for REFA and REFB. The voltage is set by channel A of the external reference buffer (U2). The buffer circuitry must be populated and at a minimum, the following components must be added: U2, R6, R7, R8, R9, R10, R11, R12, R13. In this circuit, both REFA and REFB are biased by the same voltage by shorting J12. The corresponding transfer function becomes Equation 2, where the output of the reference buffer is VREF.

Equation 2. V O U T =   ( + I N ) - ( - I N ) + V R E F
Table 2-5 Header Pins for Configuration 2
HEADER NAME SETTING
J12 Open
J13 Closed (REFA to OPA)
J14 Open
INA1H94EVM OPA Ch A Bias REFA and REFB Figure 2-6 OPA Ch A Bias REFA and REFB