The host (DSP, Microcontroller, FPGA, and so forth) configures and monitors the LMK3C0105 through the I²C port. The host reads and writes to a collection of control bits called the register set. The device blocks can be controlled and monitored through a specific grouping of bits located within the register space. In the absence of the host, the LMK3C0105 can be configured to operate in OTP mode from one of four of the on-chip OTP pages, stored in the internal EFUSE, depending on the state of REF_CTRL and OTP_SELx pins. The EFUSE is one-time programmed by TI, and is not rewritable. This means that the values of the registers that are automatically loaded from the EFUSE at power-up cannot be customized. However, the values of the registers can be changed subsequently via the I²C register interface. Within the device registers, there are certain bits that have read/write access. Other bits are read-only (an attempt to write to a read only bit does not change the state of the bit). Certain device registers and bits are reserved meaning that the fields must not be changed from the default reset state.