SNAS880A December   2024  – October 2025 LMK3C0105

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Specification
  7. 6 Parameter Measurement Information
    1. 6.1 Output Format Configurations
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Block-Level Description
      2. 7.3.2 Device Configuration Control
      3. 7.3.3 OTP Mode
      4. 7.3.4 I2C Mode
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fail-Safe Inputs
      2. 7.4.2 Fractional Output Dividers
        1. 7.4.2.1 FOD Operation
        2. 7.4.2.2 Digital State Machine
        3. 7.4.2.3 Spread-Spectrum Clocking
        4. 7.4.2.4 Integer Boundary Spurs
      3. 7.4.3 Output Behavior
        1. 7.4.3.1 Output Format Selection
        2. 7.4.3.2 REF_CTRL Operation
      4. 7.4.4 Output Enable
        1. 7.4.4.1 Output Enable Control
        2. 7.4.4.2 Output Enable Polarity
        3. 7.4.4.3 Separate Output Enable
        4. 7.4.4.4 Output Disable Behavior
      5. 7.4.5 Device Default Settings
    5. 7.5 Programming
      1. 7.5.1 I2C Serial Interface
      2. 7.5.2 One-Time Programming Sequence
  9. 8 Device Registers
    1. 8.1 Register Maps
      1. 8.1.1  R0 Register (Address = 0x0) [reset = 0x0861/0x0863]
      2. 8.1.2  R1 Register (Address = 0x1) [reset = 0x5599]
      3. 8.1.3  R2 Register (Address = 0x2) [reset = 0xC28F]
      4. 8.1.4  R3 Register (Address = 0x3) [reset = 0x1804]
      5. 8.1.5  R4 Register (Address = 0x4) [reset = 0x0000]
      6. 8.1.6  R5 Register (Address = 0x5) [reset = 0x0000]
      7. 8.1.7  R6 Register (Address = 0x6) [reset = 0x0AA7]
      8. 8.1.8  R7 Register (Address = 0x7) [reset = 0x5D1F]
      9. 8.1.9  R8 Register (Address = 0x8) [reset = 0xC28F]
      10. 8.1.10 R9 Register (Address = 0x9) [reset = 0x3000/0x1000]
      11. 8.1.11 R10 Register (Address = 0xA) [reset = 0x0010]
      12. 8.1.12 R11 Register (Address = 0xB) [reset = 0x0000]
      13. 8.1.13 R12 Register (Address = 0xC) [reset = 0xE800]
      14. 8.1.14 R238 Register (Address = 0xEE) [reset = 0x0000]
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application Block Diagram Examples
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Example: Changing Output Frequency
      5. 9.2.5 Crosstalk
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-Up Sequencing
      2. 9.3.2 Decoupling Power Supply Inputs
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.1.10 R9 Register (Address = 0x9) [reset = 0x3000/0x1000]

R9 is shown in Table 8-16.

Return to the Summary Table.

Table 8-12 R9 Register Field Descriptions
BitFieldTypeResetDescription
15:12OTP_IDR/W

0x3 (V33)

0x1 (V18)(V18)

Configurable field for identifying the OTP configuration. Can be used in I2C mode as a 4-bit spare field. This field is stored in the EFUSE.
11:9SSC_CONFIG_SELR/W0x0

SSC modulation configuration. If center-spread modulation is desired, then custom SSC configuration is required. Four preconfigured down-spread modulation depths are also available. Any other modulation depths require custom SSC configuration. This field is stored in the EFUSE.

The preconfigured SSC options are specifically for 100MHz clock outputs. For other output frequencies, TI recommends creating a custom SSC configuration.

0h: Custom SSC Configuration - see Spread-Spectrum Clocking for details on creating a custom configuration.

1h: –0.10% preconfigured down-spread.

2h: –0.25% preconfigured down-spread.

3h: –0.30% preconfigured down-spread.

4h: –0.50% preconfigured down-spread.

All other values: Reserved

8:0ReservedR/W0x000Reserved, only write '0' to this field.