SPRUHJ1I User guide

SPRUHJ1I January 2013 – October 2021 TMS320F2802-Q1 , TMS320F28026-Q1 , TMS320F28026F , TMS320F28027-Q1 , TMS320F28027F , TMS320F28027F-Q1 , TMS320F28052-Q1 , TMS320F28052F , TMS320F28052F-Q1 , TMS320F28052M , TMS320F28052M-Q1 , TMS320F28054-Q1 , TMS320F28054F , TMS320F28054F-Q1 , TMS320F28054M , TMS320F28054M-Q1 , TMS320F2806-Q1 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1

11.9 Sampling and Digital Systems Considerations

Throughout the PI tuning sections we have discussed a practical and efficient way to tune the PI controllers in a cascaded speed loop by simply specifying the desired bandwidth of the speed loop, and a factor which determines the desired damping of the system. From these two parameters, plus a rudimentary knowledge of some of the motor and load parameters, the PI coefficients for the speed loop and the inner current loop can be calculated. But nowhere have we discussed what limits are imposed upon the system, especially when dealing with a digital system. Obviously, to get a stiffer response, we would like higher gains, which also translate into higher bandwidth. But how high can we go?

To answer this question, take a look at Figure 12-22, which shows a high level view of a digital FOC based Variable Frequency Drive (VFD). To simplify the discussion, we will assume that the entire control loop is clocked by a common sampling signal, although this limitation is not imposed on real-world applications. In many cases, the speed loop is clocked at a much lower frequency than the current loop, since the frequencies associated with the speed loop are typically much lower.

Figure 11-22 Digital Field-Oriented Control System for a PMSM

In an analog system, any change in the motor feedback signals immediately starts having an effect on the output control voltages. But with the digital control system of Figure 12-22, the motor signals are sampled via the ADC at the beginning of the PWM cycle, the control calculations are performed, and the resulting control voltages are deposited into double-buffered PWM registers. These values sit unused in the PWM module until they are clocked to the PWM output at the start of the next PWM cycle. From a system modeling perspective, this looks like a sample-and-hold function with a sampling frequency equal to the PWM update rate frequency. The fixed time delay from the sample-and-hold shows up as a lagging phase angle which gets progressively worse at higher frequencies. Figure 12-23 shows a normalized frequency plot for a sample-and-hold function, where the sampling frequency is assumed to be 1. The phase plot is the most important graph, as it shows that the phase delay from the sample-and-hold can reach down into frequencies much lower than the sampling frequency. For example, even at one tenth the sampling frequency, the S&H is still affecting a phase shift of -18 degrees.

Figure 11-23 Magnitude and Phase Plots for a Sample-and-Hold

Since the current controller processes higher bandwidth signals than the speed loop, it is usually the current loop that suffers most by the S&H effect of the PWM module. Since the S&H is in series with the signal path for the current loop, its magnitude and phase contributions add directly to the open-loop response for the current controller. If we rewrite the equation for the open loop response of the current controller (assuming we have already made the substitutions recommended in the PI tuning sections), we end up with Equation 76.

Equation 76.

Where:

BW_c is the chosen closed-loop bandwidth for the current controller.

The 0 dB frequency obviously occurs when s = BW_c. The single pole at s = 0 implies that the 0 dB frequency will have a 90 degree phase margin. While there is no magic ratio that exists, it is usually preferred to use the rule of thumb that the sampling frequency should be at least 10 times the bandwidth (BW_c) of the current controller. This ensures that the impact of the S&H's phase delay will only subtract 18 degrees from the phase margin of the current controller, resulting in a very stable 72 degree margin. You can obviously have a higher sampling frequency if desired, but this typically comes at the expense of a more expensive processor with higher MIPS.

Finally, let's look at the other end of the frequency range. At low frequencies, viscous damping may affect your speed loop response times by changing the phase margin at the 0 dB frequency. Recall from Section 12.3, the following transfer function between motor torque and load speed was established:

Equation 77.

However, when viscous damping is present, it uses part of the motor's torque to do work to move fluid. Since viscous torque is directly proportional to the speed of the load, we can rewrite Equation 77 to be:

Equation 78.

Where:

kv is the viscous damping factor.

As you can see from Equation 78, adding the viscous damping term moves the pole that was at s = 0 to s = kv/J. Figure 12-24 shows how the addition of viscous damping changes the load's Bode plot.

Figure 11-24 Effect of Viscous Damping (kv) on the Load Bode Plot

From Figure 12-24, we see that as viscous damping increases from zero, low frequency gain plateaus to a value of 1/kv. The net effect on the phase plot is to add more phase margin at lower frequencies, since the phase lag of a load with viscous damping will always be less than a load with inertia only. As a result, stability should actually improve for non-zero values of kv. However, the response time may take a hit, depending on where the speed open-loop 0 dB frequency is with respect to the pole frequencies shown in Figure 12-24. So if your system response is sluggish and the motor doesn't seem to put out as much torque as it is rated for, you could have excessive viscous damping in your system.

Before closing out this series of PI Tuning sections, there is one more topic to be discussed. In many cases an engineer correctly calculates PI coefficients. After using those coefficients in their code, the motor spins out of control, or sit there and does nothing. So what happened? It is most likely the fault of one of the following situations: