SPVA018 August   2025 LM2904B

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2ESD Overview
    1. 2.1 What is Electrostatic Discharge?
      1. 2.1.1 ESD Cell Robustness in Semiconductors
  6. 3Types of ESD Cells
    1. 3.1 Dual Diode Configuration
      1. 3.1.1 Why Not Always Use Dual Diode Configuration?
    2. 3.2 Bootstrapped Diodes
    3. 3.3 Absorption Devices
      1. 3.3.1 Active Clamps
      2. 3.3.2 GCNMOS Clamps
    4. 3.4 Silicon Controlled Rectifiers
    5. 3.5 CER and ECR NPN Diodes
      1. 3.5.1 Measuring the Response of an ECR and CER ESD Cell
    6. 3.6 Comparison of ESD Cells
  7. 4How to Determine the ESD Structure of the Device from the Data Sheet
  8. 5How to Protect The System from In Circuit ESD/EOS Events
    1. 5.1 Using TVS Diodes and Series Resistance for Circuit Protection
    2. 5.2 Using Schottky Diodes for Circuit Protection
  9. 6How to Test an Op Amp in a System Level Circuit
    1. 6.1 ESD Protection Cell Advancements Over the Years
  10. 7Summary
  11. 8References

Silicon Controlled Rectifiers

Silicon controlled rectifiers, or SCRs, are another common option used for clamping. SCRs leverage hole generation at the drain of the MOSFET to increase the base current of the NPN. This has a cascading effect, and in turn, increases the current in the parasitc PNP, leading to regeneration. SCRs leverage a cascading PNP/NPN device structure for ESD protection. The SCR has a low holding voltage (VH), but high trigger voltage (VT), which creates a deep snapback effect. This effect can be clearly seen in an IV curve (Figure 3-7). Figure 3-8 is a high level design figure of a typical SCR.

 SCR IV Curve Figure 3-7 SCR IV Curve
 SCR Clamp Figure 3-8 SCR Clamp

SCRs are often used in designs where area is a key parameter, due to the small size. SCRs also have very low leakage and capacitance, providing further advantage to designs with low bias current. However, these ESD cells have a higher risk of latch-up, since the holding voltage of the cell is lower than VDD. Latch up occurs when there is positive feedback between the NPN/PNP. If latch up does occur in your device, best practice is to power cycle to prevent damage to the device.