STDA017 November   2025 TPS7A33 , TPS7A4501-SP , TPS7A47 , TPS7A47-Q1 , TPS7A4701-EP , TPS7A52 , TPS7A52-Q1 , TPS7A53 , TPS7A53-Q1 , TPS7A53A-Q1 , TPS7A53B , TPS7A54 , TPS7A54-Q1 , TPS7A57 , TPS7A8300 , TPS7A83A , TPS7A84 , TPS7A84A , TPS7A85A , TPS7A90 , TPS7A91 , TPS7A92 , TPS7A94 , TPS7A96 , TPS7B7702-Q1 , TPS7H1111-SEP , TPS7H1111-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction to Parallel LDOs Using Ballast Resistors
  5. 2Noise Analysis of Parallel LDOs Using Ballast Resistors
  6. 3LDO Output Impedance
  7. 4Strategies on Reducing the Noise of the Parallel LDO System
  8. 5Noise of Parallel LDOs Using Ballast Resistors
    1. 5.1 TPS7A57
    2. 5.2 TPS7A94
  9. 6Noise Measurements of Alternative Parallel LDO Architectures
    1. 6.1 TPS7B7702-Q1
  10. 7Conclusion
  11. 8References

TPS7A57

Measurements were captured of parallel TPS7A57 LDOs using ballast resistors [3]. Each LDO in parallel has small variations in PCB impedance which affect the total ballast resistance between the LDOs [1]. This variation in ballast resistance causes each LDO to provide slightly different current to the load [1], causing the output impedance of each LDO to vary slightly from one another (see Figure 3-1).

To reduce the influence of the unequal PCB impedances, the ballast resistor value was increased from 2.5mΩ to 50mΩ. The resulting noise spectra are shown in Figure 5-1.

TPS7A94 TPS7A96 TPS7A57 TPS7B7702-Q1 Noise Measurements of Parallel
                    TPS7A57 LDOs Figure 5-1 Noise Measurements of Parallel TPS7A57 LDOs

If noise is a critical parameter that must be absolutely minimized, a better approach than increasing RB is to match the impedance of the PCB planes after each RB of the LDOs. If a voltage drop across the ballast resistors is not critical (such as when configuring the parallel LDOs as a constant current source [4]), then a potential simpler approach is to use a large enough RB (such as 50mΩ) to mitigate the effects of parasitic PCB impedance.