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TPS7A53

ACTIVE

3-A, low-VIN (1.1 V) low-noise high-accuracy ultra-low-dropout (LDO) voltage regulator

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Data sheet

TPS7A53

ACTIVE
Data sheet Order now

Product details

Output options Adjustable Output Iout (Max) (A) 3 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5.15 Vout (Min) (V) 0.8 Noise (uVrms) 4.4 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 46.5 Rating Catalog Load capacitance (Min) (µF) 22 Regulated outputs (#) 1 Features Enable, Foldback overcurrent protection, Output discharge, Power good, Soft start Accuracy (%) 0.5 PSRR @ 100 KHz (dB) 28 Dropout voltage (Vdo) (Typ) (mV) 60 Operating temperature range (C) -40 to 125
Output options Adjustable Output Iout (Max) (A) 3 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5.15 Vout (Min) (V) 0.8 Noise (uVrms) 4.4 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 46.5 Rating Catalog Load capacitance (Min) (µF) 22 Regulated outputs (#) 1 Features Enable, Foldback overcurrent protection, Output discharge, Power good, Soft start Accuracy (%) 0.5 PSRR @ 100 KHz (dB) 28 Dropout voltage (Vdo) (Typ) (mV) 60 Operating temperature range (C) -40 to 125
VQFN-HR (RPS) 12 6 mm² 2.5 x 2.2
  • 0.5% (max) accuracy over line, load, and temperature with BIAS
  • Output voltage noise: 4.4 µVRMS
  • Low dropout: 110 mV (max) at 3 A with BIAS
  • Power-supply rejection ratio:
    • 40 dB at 500 kHz
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Adjustable output voltage range: 0.8 V to 5.2 V
  • Adjustable soft-start inrush control
  • Open-drain, power-good (PG) output
  • 2.2-mm × 2.5-mm, 12-pin VQFN package
  • 0.5% (max) accuracy over line, load, and temperature with BIAS
  • Output voltage noise: 4.4 µVRMS
  • Low dropout: 110 mV (max) at 3 A with BIAS
  • Power-supply rejection ratio:
    • 40 dB at 500 kHz
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Adjustable output voltage range: 0.8 V to 5.2 V
  • Adjustable soft-start inrush control
  • Open-drain, power-good (PG) output
  • 2.2-mm × 2.5-mm, 12-pin VQFN package

The TPS7A53 is a low-noise (4.4 µVRMS), ultra-low dropout linear-regulator (LDO) capable of sourcing 3 A with only 110 mV of maximum dropout. The device output voltage is adjustable from 0.8 V to 5.2 V using an external resistor divider.

The combination of low noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A53 an excellent choice to power noise-sensitive components such as those found in high-speed communications, video, medical, or test-and-measurement applications. The high performance of this device limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). Specifically, RF amplifiers benefit from the high performance and
5.2-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.5% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A53 provides optimal system performance.

As an adjustable voltage regulator, there is versatility in the design of the TPS7A53 that makes the device a component of choice for analog loads such as VCO, ADC, DAC, and imaging sensors and for digital loads such as SerDes, FPGAs, and DSPs.

The TPS7A53 is a low-noise (4.4 µVRMS), ultra-low dropout linear-regulator (LDO) capable of sourcing 3 A with only 110 mV of maximum dropout. The device output voltage is adjustable from 0.8 V to 5.2 V using an external resistor divider.

The combination of low noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A53 an excellent choice to power noise-sensitive components such as those found in high-speed communications, video, medical, or test-and-measurement applications. The high performance of this device limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). Specifically, RF amplifiers benefit from the high performance and
5.2-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.5% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A53 provides optimal system performance.

As an adjustable voltage regulator, there is versatility in the design of the TPS7A53 that makes the device a component of choice for analog loads such as VCO, ADC, DAC, and imaging sensors and for digital loads such as SerDes, FPGAs, and DSPs.
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Technical documentation

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* Data sheet TPS7A53 3-A, High-Accuracy (0.5%), Low-Noise (4.4 µVRMS), LDO Voltage Regulator datasheet (Rev. B) PDF | HTML 07 May 2020
Technical article Minimize noise and ripple with a low-noise buck converter 21 Oct 2020

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TPS7A53EVM-031 — TPS7A53 evaluation module for 3-A, low-VIN, low-noise, high-accuracy ultra-LDO voltage regulator

The TPS7A53 evaluation module (EVM) is designed for a typical configuration to evaluate the operation and performance of the TPS7A53 device, which is a high-accuracy, 3-A, low-VIN, low-VOUT, low-dropout (LDO) voltage regulator.

The EVM circuit board is configured to be a reference design for (...)

User guide: PDF
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Simulation model

TPS7A5301RPS PSpice Model

SBVM954.ZIP (19 KB) - PSpice Model
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Reference designs

TIDA-010230 — Multi-channel RF transceiver, low-noise clocking reference design for radar and EW applications

In modern radar and electronic warfare (EW) systems, active electronically-scanned array (AESA) antenna systems are often used with high speed multi-channel RF transceivers. These systems require very low noise clocking capable of precise channel-to-channel skew adjustment to achieve the optimal (...)
Design guide: PDF
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VQFN-HR (RPS) 12 View options

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