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TPS7A47-Q1

ACTIVE

Automotive, 1A, 36V low-noise high-PSRR low-dropout voltage regulator with enable

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Data sheet

TPS7A47-Q1

ACTIVE
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Product details

Rating Automotive Vin (max) (V) 36 Vin (min) (V) 3 Iout (max) (A) 1 Output options Adjustable Output, Fixed Output Vout (max) (V) 34 Vout (min) (V) 1.4 Noise (µVrms) 4 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.58 Features Enable Thermal resistance θJA (°C/W) 31.1 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 216 Operating temperature range (°C) -40 to 125
Rating Automotive Vin (max) (V) 36 Vin (min) (V) 3 Iout (max) (A) 1 Output options Adjustable Output, Fixed Output Vout (max) (V) 34 Vout (min) (V) 1.4 Noise (µVrms) 4 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.58 Features Enable Thermal resistance θJA (°C/W) 31.1 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 216 Operating temperature range (°C) -40 to 125
VQFN (RGW) 20 25 mm² (5 mm × 5 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4A
  • Input Voltage: 3 V to 35 V
  • Operating Junction Temperature: –40°C to +145°C
  • Output Voltage Noise:
    4.2 µVRMS (10 Hz–100 kHz)
  • Power-Supply Rejection Ratio:
    • 82 dB (100 Hz)
    • ≥ 55 dB (10 Hz–10 MHz)
  • Two Output Voltage Modes:
    • ANY-OUT™ Version (User-Programmable Output via PCB Layout):
      • Output Voltage: 1.4 V to 20.5 V
    • Adjustable Operation:
      • Output Voltage: 1.4 V to 34 V
  • Output Current: 1 A
  • Thermal resistance: θJA = 31.1°C/W
  • Dropout Voltage: 307 mV at 1 A
  • CMOS Logic Level-Compatible Enable Pin
  • Built-In Fixed Current Limit and
    Thermal Shutdown
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4A
  • Input Voltage: 3 V to 35 V
  • Operating Junction Temperature: –40°C to +145°C
  • Output Voltage Noise:
    4.2 µVRMS (10 Hz–100 kHz)
  • Power-Supply Rejection Ratio:
    • 82 dB (100 Hz)
    • ≥ 55 dB (10 Hz–10 MHz)
  • Two Output Voltage Modes:
    • ANY-OUT™ Version (User-Programmable Output via PCB Layout):
      • Output Voltage: 1.4 V to 20.5 V
    • Adjustable Operation:
      • Output Voltage: 1.4 V to 34 V
  • Output Current: 1 A
  • Thermal resistance: θJA = 31.1°C/W
  • Dropout Voltage: 307 mV at 1 A
  • CMOS Logic Level-Compatible Enable Pin
  • Built-In Fixed Current Limit and
    Thermal Shutdown

The TPS7A47-Q1 device is a positive voltage (35 V), ultra-low-noise (4.2 µVRMS) low-dropout linear regulator (LDO) capable of sourcing a 1-A load.

The TPS7A47-Q1 output voltage can be configured with a user-programmable printed circuit board (PCB) layout (up to 20.5 V), or adjustable (up to 34 V) with external feedback resistors.

The TPS7A47-Q1 is designed with bipolar technology primarily for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This feature makes the device ideal for powering operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A47-Q1 is ideal for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversions, maximum system performance is ensured in sensitive instrumentation, audio, and RF applications.

The TPS7A47-Q1 device is a positive voltage (35 V), ultra-low-noise (4.2 µVRMS) low-dropout linear regulator (LDO) capable of sourcing a 1-A load.

The TPS7A47-Q1 output voltage can be configured with a user-programmable printed circuit board (PCB) layout (up to 20.5 V), or adjustable (up to 34 V) with external feedback resistors.

The TPS7A47-Q1 is designed with bipolar technology primarily for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This feature makes the device ideal for powering operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A47-Q1 is ideal for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversions, maximum system performance is ensured in sensitive instrumentation, audio, and RF applications.
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Technical documentation

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* Data sheet TPS7A47-Q1 35-V, 1-A, 4.2-µVRMS, RF LDO Voltage Regulator datasheet PDF | HTML Aug 22, 2017
White paper Reduce System Noise Using Parallel LDOs PDF | HTML Nov 3, 2025
Application note An empirical analysis of the impact of board layout on LDO thermal performance (Rev. A) PDF | HTML Sep 23, 2025
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML Dec 14, 2022
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML Dec 13, 2022
Application note A Topical Index of TI LDO Application Notes (Rev. F) Jun 27, 2019
E-book LDO Basics (Rev. A) Apr 8, 2019
Technical article LDO basics: dropout PDF | HTML Mar 16, 2017
User guide TPS7A47xxEVM-094 Evaluation Module (Rev. A) Aug 2, 2013

Design & development

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Evaluation board

TPS7A4701EVM-094 — TPS7A4701 RF low-dropout (LDO) voltage regulator evaluation module

The TPS7A4701EVM-094 is a fully assembled and tested evaluation module (EVM) for evaluating the TPS7A47 ultra-low-noise low-dropout (LDO) regulator at adjustable output voltages that range from 1.4 V to 34 V. The EVM circuit is configured to be a reference design for engineering applications (...)
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Simulation model

TPS7A4701 PSpice Transient Model (Rev. B)

SBVM364B.ZIP (42 KB) - PSpice model
Supported products & hardware
Calculation tool

PARALLEL-LDO-CALC — Parallel low-dropout (LDO) calculator

The parallel low-dropout (LDO) calculator is a Microsoft® Excel®-based tool that provides worst-case analysis for parallel LDO regulators using ballast resistors. The tool helps the user identify the minimum number of parallel LDO regulators required and optimum ballast resistance for a (...)

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VQFN (RGW) 20 Ultra Librarian
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