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TPS7A90

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500-mA, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy

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500-mA, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy

TPS7A90

ACTIVE
Data sheet Order now

Product details

Parameters

Output options Adjustable Output Iout (Max) (A) 0.5 Vin (Max) (V) 6.5 Vin (Min) (V) 1.4 Vout (Max) (V) 5.7 Vout (Min) (V) 0.8 Noise (uVrms) 4.7 Iq (Typ) (mA) 2.1 Thermal resistance θJA (°C/W) 57 Load capacitance (Min) (µF) 22 Rating Catalog Regulated outputs (#) 1 Features Enable, Foldback Overcurrent Protection, Output Discharge, Power Good, Soft Start Accuracy (%) 1 PSRR @ 100 KHz (dB) 48 Dropout voltage (Vdo) (Typ) (mV) 75 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

WSON (DSK) 10 6 mm² 2.5 x 2.5 open-in-new Find other Linear regulators (LDO)

Features

  • 1.0% accuracy over line, load, and temperature
  • Low output noise: 4.7 µVRMS (10 Hz–100 kHz)
  • Low dropout: 100 mV (max) at 0.5 A
  • Wide input voltage range: 1.4 V to 6.5 V
  • Wide output voltage range: 0.8 V to 5.7 V
  • High power-supply rejection ratio (PSRR):
    • 60 dB at DC
    • 50 dB at 100 kHz
    • 30 dB at 1 MHz
  • Fast transient response
  • Adjustable start-up in-rush control with selectable soft-start charging current
  • Open-drain power-good (PG) output
  • RθJC = 3.2ºC/W
  • 2.5-mm × 2.5-mm, 10-pin WSON package

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Description

The TPS7A90 is a low-noise (4.7 µVRMS), low-dropout (LDO) voltage regulator capable of sourcing 500 mA with only 100 mV of maximum dropout to 5 V and 200 mV to 5.7 V.

The TPS7A90 output is adjustable with external resistors from 0.8 V to 5.7 V. The TPS7A90 wide input voltage range supports operation as low as 1.4 V and up to 6.5 V.

With 1% output voltage accuracy (over line, load, and temperature) and soft-start capabilities to reduce in-rush current, the TPS7A90 is ideal for powering sensitive analog low-voltage devices [such as voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs)].

The TPS7A90 is designed to power noise-sensitive components such as those found in high-speed communication, video, medical, or test and measurement applications. The very low 4.7-µVRMS output noise and wideband PSRR (30 dB at 1 MHz) minimizes phase noise and clock jitter. These features maximize performance of clocking devices, ADCs, and DACs.





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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 8
Type Title Date
* Datasheet TPS7A90 500-mA, High-Accuracy, Low-Noise LDO Voltage Regulator datasheet (Rev. A) Jun. 29, 2020
Application notes High-Performance CMOS Image Sensor Power Supply in Industrial Camera and Vision Aug. 05, 2019
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Selection guides Low Dropout Regulators Quick Reference Guide (Rev. P) Mar. 21, 2018
Technical articles LDO basics: noise – part 1 Jun. 14, 2017
User guides TPS7A91EVM-831 Evaluation Module User's Guide Nov. 29, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
249
Description

The ADC3541 evaluation module (EVM) is a platform that demonstrates the performance of the ultra-low-power, high-linearity ADC3541 product. Onboard voltage regulation and flexible analog input options allow for easy evaluation for many different applications.

Interfacing to the TSW1400EVM (sold (...)

Features
  • Parallel and serial CMOS interface
  • USB powered with onboard power regulation
  • Pin compatible with ADC354x products
  • THS4541 FDA and balun-coupled inputs allow for flexible evaluation
  • TSW1400EVM and high-speed data converter pro software (DATACONVERTERPRO-SW) allow for easy data capture
  • FMC connector allows (...)
View details
EVALUATION BOARDS Download
document-generic User guide
29
Description
The TPS7A91EVM-831 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A91, 1A high-accuracy, low dropout voltage regulator. The EVM circuit board is configured to be a reference design for engineering applications requiring current to a (...)
Features
Low Dropout: 200 mV (max) at 1 A
1% (max) Accuracy Over Line, Load, and Temperature
Low Output Noise: 3.8μVRMS (10 Hz–100 kHz)
Adjustable Output Voltage Range: 0.8 V to 5.2 V
High Power-Supply Ripple Rejection: 40 dB at 100 kHz
View details

Design tools & simulation

SIMULATION MODELS Download
SBVM709.ZIP (92 KB) - PSpice Model
SIMULATION MODELS Download
SBVM710.ZIP (2 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
Multichannel RF transceiver clocking reference design for RADARs and wireless 5G testers
TIDA-010131 — Analog front end for high-speed end equipments like phased-array radars, wireless communication testers, and electronic warfare require synchronized, multipletransceiver signal chains. Each transceiver signal chain includes high-speed, analog-to-digital converters (ADCs), digital-to-analog (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High Channel Count JESD204B Clock Generation Reference Design for RADAR and 5G Wireless Testers
TIDA-01023 — High-speed multi-channel applications require low noise and scalable clocking solutions capable of precise channel-to-channel skew adjustment to achieve optimal system SNR, SFDR, and ENOB. This reference design supports high channel count JESD204B synchronized clocks using one master and multiple (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High Channel Count JESD204B Daisy Chain Clock Reference Design for RADAR and 5G Wireless Testers
TIDA-01024 — High-speed multi-channel applications require low noise and scalable clocking solutions capable of precise channel-to-channel skew adjustment to achieve optimal system SNR, SFDR, and ENOB. This reference design supports scaling up JESD204B synchronized clocks in daisy chain configuration. This (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SON (DSK) 10 View options

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