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TPS7A84

ACTIVE

3-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy

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Data sheet

TPS7A84

ACTIVE
Data sheet Order now

Product details

Output options Adjustable Output, Programmable Output Iout (Max) (A) 3 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5 Vout (Min) (V) 0.8 Noise (uVrms) 4.4 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 35 Rating Catalog Load capacitance (Min) (µF) 47 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR @ 100 KHz (dB) 25 Dropout voltage (Vdo) (Typ) (mV) 110 Operating temperature range (C) -40 to 125
Output options Adjustable Output, Programmable Output Iout (Max) (A) 3 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5 Vout (Min) (V) 0.8 Noise (uVrms) 4.4 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 35 Rating Catalog Load capacitance (Min) (µF) 47 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR @ 100 KHz (dB) 25 Dropout voltage (Vdo) (Typ) (mV) 110 Operating temperature range (C) -40 to 125
VQFN (RGR) 20 12 mm² 3.5 x 3.5
  • Low dropout: 180 mV (max) at 3 A
  • 1% (max) accuracy over line, load, and temperature
  • Output voltage noise:
    • 4.4 µVRMS at 0.8-V output
    • 7.7 µVRMS at 5.0-V output
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • ANY-OUT™ operation:
    • Output voltage range: 0.8 V to 3.95 V
  • Adjustable operation:
    • Output voltage range: 0.8 V to 5.0 V
  • Power-supply ripple rejection:
    • 40 dB at 500 kHz
  • Excellent load transient response
  • Adjustable soft-start in-rush control
  • Open-drain power-good (PG) output
  • Stable with a 47-µF or larger ceramic output capacitor
  • 3.5-mm × 3.5-mm, 20-pin VQFN
  • Low dropout: 180 mV (max) at 3 A
  • 1% (max) accuracy over line, load, and temperature
  • Output voltage noise:
    • 4.4 µVRMS at 0.8-V output
    • 7.7 µVRMS at 5.0-V output
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • ANY-OUT™ operation:
    • Output voltage range: 0.8 V to 3.95 V
  • Adjustable operation:
    • Output voltage range: 0.8 V to 5.0 V
  • Power-supply ripple rejection:
    • 40 dB at 500 kHz
  • Excellent load transient response
  • Adjustable soft-start in-rush control
  • Open-drain power-good (PG) output
  • Stable with a 47-µF or larger ceramic output capacitor
  • 3.5-mm × 3.5-mm, 20-pin VQFN

The TPS7A84 is a low-noise (4.4 µVRMS), low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180 mV of maximum dropout. The device output voltage is pin-programmable from 0.8 V to 3.95 V and adjustable from 0.8 V to 5.0 V using an external resistor divider.

The combination of low-noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A84 ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84 limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and 5.0-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84 ensure optimal system performance.

The versatility of the TPS7A84 makes the device a component of choice for many demanding applications.

The TPS7A84 is a low-noise (4.4 µVRMS), low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180 mV of maximum dropout. The device output voltage is pin-programmable from 0.8 V to 3.95 V and adjustable from 0.8 V to 5.0 V using an external resistor divider.

The combination of low-noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A84 ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84 limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and 5.0-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84 ensure optimal system performance.

The versatility of the TPS7A84 makes the device a component of choice for many demanding applications.
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Technical documentation

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Type Title Date
* Data sheet TPS7A84 High-Current (3 A), High-Accuracy (1%), Low-Noise (4.4 µVRMS), LDO Voltage Regulator datasheet (Rev. B) 23 Jun 2021
Analog Design Journal Clutter‐free power supplies for RF converters in radar applications (Part 1)  18 Mar 2021
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Technical article Optimizing LDO voltage accuracy 06 May 2016
EVM User's guide TPS7A84EVM-753 Evaluation Module 29 Feb 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TPS7A84EVM-753 — TPS7A84 3-A high-current, 1% high-accuracy, 4.4-μVRMS LDO regulator evaluation module

The TPS7A84EVM-753 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A84, High-Current 3-A low dropout voltage regulator. The EVM circuit board is configured to be a reference design for engineering applications requiring current to a (...)
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Simulation model

TPS7A84 Unencrypted PSpice Transient Model

SBVM574.ZIP (3 KB) - PSpice Model
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Simulation model

TPS7A84 PSpice Transient Model

SBVM575.ZIP (76 KB) - PSpice Model
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Reference designs

TIDA-01022 — Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems

This high speed multi-channel data capture reference design enables optimum system performance. System designers needs to consider critical design parameters like clock jitter and skew for high speed multi-channel clock generation, which affects overall system SNR, SFDR, channel to channel skew (...)
document-pdfAcrobat Schematic
Reference designs

TIDA-010122 — Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems

This reference design addresses synchronization design challenges associated with emerging 5G adapted applications like massive multiple input multiple output (mMIMO), phase array radar and communication payload. The typical RF front end contains antenna, low-noise amplifier (LNA), mixer, local (...)
document-pdfAcrobat Schematic
Reference designs

TIDA-010128 — Scalable 20.8 GSPS reference design for 12 bit digitizers

This reference design describes a 20.8 GSPS sampling system using RF sampling analog-to-digital converters (ADCs) in time interleaved configuration. Time interleaving method is a proven and traditional way of increasing sample rate, however, matching individual ADCs offset, gain and sampling time (...)
document-pdfAcrobat Schematic
Reference designs

TIDA-01028 — 12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer

This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is done by time interleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)
document-pdfAcrobat Schematic
Reference designs

TIDA-01027 — Low-noise power supply reference design maximizing performance in 12.8-GSPS data acquisition systems

This reference design demonstrates an efficient, low-noise five-rail power supply design for very high-speed Data Acquisition (DAQ) systems capable of > 12.8 GSPS. The power supply DC/DC converters are frequency-synchronized and phase-shifted in order to minimize input current ripple and (...)
document-pdfAcrobat Schematic
Reference designs

TIDA-01466 — Low-Voltage, Low-Noise Power-Supply Reference Design for Ultrasound Front End

This reference design is a power supply optimized specifically for providing power to eight 16-channel receive AFE ICs for ultrasound imaging systems. This design reduces part count while maximizing efficiency by using single-chip DC-DC converter + LDO combo regulators to set the LDO input just (...)
document-pdfAcrobat Schematic
Reference designs

TIDA-01232 — High-Current Low-Noise Parallel LDO Reference Design

This parallel low-dropout (LDO) reference design showcases the TPS7A85 low-noise LDO linear regulator in a parallel configuration, which is capable of sourcing 3.5 A per LDO or 7 A per board. Additional design flexibility includes the ability to stack this design to meet the current (...)
document-pdfAcrobat Schematic
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VQFN (RGR) 20 View options

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