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TPS7A8300

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2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy

Data sheet
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2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy

TPS7A8300

ACTIVE
Data sheet Order now

Product details

Parameters

Output options Adjustable Output, Programmable Output Iout (Max) (A) 2 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5 Vout (Min) (V) 0.8 Noise (uVrms) 6 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 34 Load capacitance (Min) (µF) 47 Rating Catalog Regulated outputs (#) 1 Features Enable, Output Discharge, Power Good, Soft Start Accuracy (%) 1 PSRR @ 100 KHz (dB) 40 Dropout voltage (Vdo) (Typ) (mV) 85 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

VQFN (RGR) 20 12 mm² 3.5 x 3.5 VQFN (RGW) 20 25 mm² 5 x 5 open-in-new Find other Linear regulators (LDO)

Features

  • Ultralow Dropout: 125 mV Maximum at 2 A
  • Output Voltage Noise: 6 µVRMS
  • Power-Supply Ripple Rejection:
    • 40 dB at 1 MHz
  • Input Voltage Range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Two Output Voltage Modes:
    • ANY-OUT™ Version (User-Programmable Output via PCB Layout):
      • No External Resistor Required
      • Output Voltage Range: 0.8 V to 3.95 V
    • Adjustable Version:
      • Output Voltage Range: 0.8 V to 5.0 V
  • 1.0% Accuracy Over Line, Load, and Temperature
  • Stable with a 22-µF Output Ceramic Capacitor
  • Programmable Soft-Start Output
  • Power-Good (PG) Output
  • Available Packages:
    • 5-mm × 5-mm VQFN-20
    • 3.5-mm × 3.5-mm VQFN-20
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Description

The TPS7A8300 is a low-noise (6 µVRMS), low-dropout voltage regulator (LDO) capable of sourcing a 2-A load with only 125 mV of maximum dropout.

The TPS7A8300 output voltages are fully user-adjustable (up to 3.95 V) using a printed circuit board (PCB) layout without the need of external resistors, thus reducing overall component count. For higher output voltage applications, the device achieves output voltages up to 5 V with the use of external resistors. The device supports very low input voltages (down to 1.1 V) with the use of an additional BIAS rail.

With very high accuracy (1% over line, load, and temperature), remote sensing, and soft-start capabilities to reduce inrush current, the TPS7A8300 is ideal for powering high-current, low-voltage devices such as high-end microprocessors and field-programmable gate arrays (FPGAs).

The TPS7A8300 is designed to power-up noise-sensitive components in high-speed communication applications. The very low-noise, 6-µVRMS device output and high broad-bandwidth PSRR (40 dB at 1 MHz) minimizes phase noise and clock jitter in high-frequency signals. These features maximize performance of clocking devices, analog-to-digital converters (ADCs), and digital-to-analog converters (DACs).

For applications where positive and negative low-noise rails are required, consider TI’s TPS7A33 family of negative high-voltage, ultralow-noise linear regulators.

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TPS7A89 ACTIVE 2-A, low-noise, high-accuracy, dual-channel adjustable ultra-low-dropout voltage regulator Dual-channel, low-noise, 2A LDO
TPS7A92 ACTIVE 2-A, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy 2-A, low noise (4.7uVrms) LDO in a small package (2.5 mm x 2.5mm)
Similar but not functionally equivalent to the compared device:
TPS7A83A ACTIVE 2-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good 2-A LDO with low-noise (4.4 µVrms) and low-dropout (200mV) and improved accuracy (0.75%)

Technical documentation

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Type Title Date
* Datasheet TPS7A8300 2-A, 6-µVRMS, RF, LDO Voltage Regulator datasheet (Rev. F) Oct. 23, 2015
Application note A Topical Index of TI LDO Application Notes (Rev. F) Jun. 27, 2019
Application note Auxiliary circuits for high-performance audio Jan. 16, 2019
Technical article LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical article LDO Basics: Preventing reverse current Jul. 25, 2018
Technical article LDO basics: introduction to quiescent current Jun. 20, 2018
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) Mar. 21, 2018
Technical article What is a low noise inverting buck converter? Oct. 30, 2017
User guide Power-Management-Laborkit LDO- Experimentierbuch (Rev. B) Sep. 19, 2017
User guide PMLK LDO Experiment Book (Rev. B) Apr. 21, 2017
Selection guide TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017
User guide Cost Effective Test Methods Using PMLK LDO Boards (Rev. A) Aug. 31, 2016
User guide PMLK LDO Experiment Book (Rev. A) Aug. 31, 2016
White paper How to measure LDO noise Jul. 24, 2015
Application note Pros and Cons of Using a Feed-Forward Capacitor with a Low Dropout Regulator Jul. 10, 2014
User guide TPS7A8300EVM-579 User's Guide Apr. 07, 2014
User guide TPS7A8300EVM-209 Evaluation Module May 20, 2013
Application note ANY-OUT™ LDO Controlled by I2C™ IO Expander Device (Rev. A) Sep. 20, 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
799
Description
The ADS54J20EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J20 and LMK04828 clock jitter cleaner. The ADS54J20 is a low power, 12-bit, 1-GSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B interface (...)
Features
  • Flexible transformer coupled analog input to allow for a variety of sources and frequencies
  • Easy to use software GUI to configure the ADS54J20 and LMK04828 for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High Speed Data Converter Pro software
  • Simple (...)
View details
EVALUATION BOARD Download
document-generic User guide
799
Description

The ADS54J40EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J40 and LMK04828 clock jitter cleaner. The ADS54J40 is a low power, 14-bit, 1-GSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B interface (...)

Features
  • Flexible transformer coupled analog input to allow for a variety of sources and frequencies
  • Easy to use software GUI to configure the ADS54J40 and LMK04828 for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High Speed Data Converter Pro software
  • Simple (...)
View details
EVALUATION BOARD Download
document-generic User guide
799
Description
The ADS54J42EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J42 and LMK04828 clock jitter cleaner. The ADS54J42 is a low power, 14-bit, 625-GMSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B (...)
Features
  • Flexible transformer coupled analog input to allow for a variety of sources and frequencies
  • Easy to use software GUI to configure the ADS54J42 and LMK04828 for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High Speed Data Converter Pro software
  • Simple (...)
View details
EVALUATION BOARD Download
document-generic User guide
799
Description

The ADS54J69EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J69 and LMK04828 clock jitter cleaner. The ADS54J69 is a low power, 16-bit, 500-MSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B (...)

Features
  • Flexible transformer-coupled analog input to allow for a variety of sources and frequencies
  • Easy to use software GUI to configure the ADS54J69 and LMK04828 for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High Speed Data Converter Pro software
  • Simple (...)
View details
EVALUATION BOARD Download
document-generic User guide
20
Description
The TPS7A8300EVM-209 evaluation module (EVM) helps designers evaluate the operation and performance of the TPS7A8300, 2-A Low-Dropout Voltage Regulator for High Speed Communication Systems. The EVM circuit is configured to be a reference design for engineering applications requiring current to a (...)
Features
  • Ultra-Low Dropout: 125mV (max)
  • Very Good PSRR: Over 40dB up to 1MHz
  • Very Low Noise: 6µVRMS
  • Low Input Voltage Range without Bias: 1.4V to 6.5V
  • Low Input Voltage Range with Bias: 1.1V to 6.5V
  • ANY-OUT: No- Resistor, Configurable Output Voltage: 0.8V to 3.95V in 50mV step
  • 1.0% Accuracy over Line, Load and (...)
View details
EVALUATION BOARD Download
document-generic User guide
20
Description

The TPS7A8300EVM-579 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A8300, 2-A low dropout voltage regulator for high speed communication systems.

The EVM circuit board is configured to be a reference design for engineering applications (...)

Features
  • Very low noise: 6 uVRMS
  • High PSRR: Over 40 dB up to 60 MHz
  • Ultra-low Dropout: 125mV (max)
  • Low Input Voltage Range: 1.4V to 6.5V (no bias rail), 1.1V to 6.5 (with bias rail)
  • ANY-OUT: No-Resistor, Configurable Output Voltage: 0.8V to 3.95V in 50mV step
View details
DEVELOPMENT KIT Download
document-generic User guide
49
Description

Our TI-PMLK LDO experiment board is part of the TI Power Management Lab Kit (TI-PMLK) series. TI-PMLK series provides hands on learning to reinforce power supply knowledge. The modular format lets you customize the TI-PMLK series experience in a way that makes the most impact (...)

Features
  • Two different IC sections to expand the learning experience
  • Each section is configurable with jumpers for different exercises
  • The LDO board is accompanied by a downloadable LDO experiments book       
View details

Design tools & simulation

SIMULATION MODEL Download
SBAM414.ZIP (55 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SBVM356B.ZIP (50 KB) - PSpice Model
SIMULATION MODEL Download
SBVM380.TSC (57 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SBVM381.ZIP (8 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SBVM525.ZIP (2 KB) - PSpice Model

Reference designs

Many TI reference designs include the TPS7A8300 Use our reference design selection tool to review and identify designs that best match your application and parameters.
View reference designs

CAD/CAE symbols

Package Pins Download
VQFN (RGR) 20 View options
VQFN (RGW) 20 View options

Ordering & quality

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  • MSL rating/Peak reflow
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  • Qualification summary
  • Ongoing reliability monitoring

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