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TPS7A8300

ACTIVE

2-A, low-VIN, low-2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good wi

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Data sheet

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Same functionality with different pin-out to the compared device.
TPS7A92 ACTIVE 2-A, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy 2-A, low noise (4.7 µVrms) LDO in a small package (2.5 mm x 2.5 mm).
Similar functionality to the compared device.
TPS7A83A ACTIVE 2-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good 2-A LDO with low-noise (4.4 µVrms) and low-dropout (200 mV) and improved accuracy (0.75%).

TPS7A8300

ACTIVE
Data sheet Order now

Product details

Output options Adjustable Output, Programmable Output Iout (Max) (A) 2 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5 Vout (Min) (V) 0.8 Noise (uVrms) 6 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 34 Rating Catalog Load capacitance (Min) (µF) 47 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR @ 100 KHz (dB) 40 Dropout voltage (Vdo) (Typ) (mV) 85 Operating temperature range (C) -40 to 125
Output options Adjustable Output, Programmable Output Iout (Max) (A) 2 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5 Vout (Min) (V) 0.8 Noise (uVrms) 6 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 34 Rating Catalog Load capacitance (Min) (µF) 47 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR @ 100 KHz (dB) 40 Dropout voltage (Vdo) (Typ) (mV) 85 Operating temperature range (C) -40 to 125
VQFN (RGR) 20 12 mm² 3.5 x 3.5 VQFN (RGW) 20 25 mm² 5 x 5
  • Ultralow Dropout: 125 mV Maximum at 2 A
  • Output Voltage Noise: 6 µVRMS
  • Power-Supply Ripple Rejection:
    • 40 dB at 1 MHz
  • Input Voltage Range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Two Output Voltage Modes:
    • ANY-OUT™ Version (User-Programmable Output via PCB Layout):
      • No External Resistor Required
      • Output Voltage Range: 0.8 V to 3.95 V
    • Adjustable Version:
      • Output Voltage Range: 0.8 V to 5.0 V
  • 1.0% Accuracy Over Line, Load, and Temperature
  • Stable with a 22-µF Output Ceramic Capacitor
  • Programmable Soft-Start Output
  • Power-Good (PG) Output
  • Available Packages:
    • 5-mm × 5-mm VQFN-20
    • 3.5-mm × 3.5-mm VQFN-20
  • Ultralow Dropout: 125 mV Maximum at 2 A
  • Output Voltage Noise: 6 µVRMS
  • Power-Supply Ripple Rejection:
    • 40 dB at 1 MHz
  • Input Voltage Range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Two Output Voltage Modes:
    • ANY-OUT™ Version (User-Programmable Output via PCB Layout):
      • No External Resistor Required
      • Output Voltage Range: 0.8 V to 3.95 V
    • Adjustable Version:
      • Output Voltage Range: 0.8 V to 5.0 V
  • 1.0% Accuracy Over Line, Load, and Temperature
  • Stable with a 22-µF Output Ceramic Capacitor
  • Programmable Soft-Start Output
  • Power-Good (PG) Output
  • Available Packages:
    • 5-mm × 5-mm VQFN-20
    • 3.5-mm × 3.5-mm VQFN-20

The TPS7A8300 is a low-noise (6 µVRMS), low-dropout voltage regulator (LDO) capable of sourcing a 2-A load with only 125 mV of maximum dropout.

The TPS7A8300 output voltages are fully user-adjustable (up to 3.95 V) using a printed circuit board (PCB) layout without the need of external resistors, thus reducing overall component count. For higher output voltage applications, the device achieves output voltages up to 5 V with the use of external resistors. The device supports very low input voltages (down to 1.1 V) with the use of an additional BIAS rail.

With very high accuracy (1% over line, load, and temperature), remote sensing, and soft-start capabilities to reduce inrush current, the TPS7A8300 is ideal for powering high-current, low-voltage devices such as high-end microprocessors and field-programmable gate arrays (FPGAs).

The TPS7A8300 is designed to power-up noise-sensitive components in high-speed communication applications. The very low-noise, 6-µVRMS device output and high broad-bandwidth PSRR (40 dB at 1 MHz) minimizes phase noise and clock jitter in high-frequency signals. These features maximize performance of clocking devices, analog-to-digital converters (ADCs), and digital-to-analog converters (DACs).

For applications where positive and negative low-noise rails are required, consider TI’s TPS7A33 family of negative high-voltage, ultralow-noise linear regulators.

The TPS7A8300 is a low-noise (6 µVRMS), low-dropout voltage regulator (LDO) capable of sourcing a 2-A load with only 125 mV of maximum dropout.

The TPS7A8300 output voltages are fully user-adjustable (up to 3.95 V) using a printed circuit board (PCB) layout without the need of external resistors, thus reducing overall component count. For higher output voltage applications, the device achieves output voltages up to 5 V with the use of external resistors. The device supports very low input voltages (down to 1.1 V) with the use of an additional BIAS rail.

With very high accuracy (1% over line, load, and temperature), remote sensing, and soft-start capabilities to reduce inrush current, the TPS7A8300 is ideal for powering high-current, low-voltage devices such as high-end microprocessors and field-programmable gate arrays (FPGAs).

The TPS7A8300 is designed to power-up noise-sensitive components in high-speed communication applications. The very low-noise, 6-µVRMS device output and high broad-bandwidth PSRR (40 dB at 1 MHz) minimizes phase noise and clock jitter in high-frequency signals. These features maximize performance of clocking devices, analog-to-digital converters (ADCs), and digital-to-analog converters (DACs).

For applications where positive and negative low-noise rails are required, consider TI’s TPS7A33 family of negative high-voltage, ultralow-noise linear regulators.
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Technical documentation

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Type Title Date
* Data sheet TPS7A8300 2-A, 6-µVRMS, RF, LDO Voltage Regulator datasheet (Rev. F) PDF | HTML 23 Oct 2015
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Circuit design Auxiliary circuits for high-performance audio 16 Jan 2019
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Technical article What is a low noise inverting buck converter? 30 Oct 2017
User guide Power-Management-Laborkit LDO- Experimentierbuch (Rev. B) 19 Sep 2017
Technical article LDO basics: noise – how a feed-forward capacitor improves system performance 25 Jul 2017
User guide PMLK LDO Experiment Book (Rev. B) 21 Apr 2017
User guide Cost Effective Test Methods Using PMLK LDO Boards (Rev. A) 31 Aug 2016
User guide PMLK LDO Experiment Book (Rev. A) 31 Aug 2016
White paper How to measure LDO noise 24 Jul 2015
Technical article Reducing high-speed signal chain power supply issues 18 Nov 2014
Application note Pros and Cons of Using a Feed-Forward Capacitor with a Low Dropout Regulator 10 Jul 2014
Technical article How to increase resolution in ANY-OUT programmable output voltage devices 26 Apr 2014
EVM User's guide TPS7A8300EVM-579 User's Guide 07 Apr 2014
User guide TPS7A8300EVM-209 Evaluation Module 20 May 2013
Application note ANY-OUT™ LDO Controlled by I2C™ IO Expander Device (Rev. A) 20 Sep 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS54J20EVM — ADS54J20 Dual-Channel, 12-Bit, 1.0-GSPS Analog-to-Digital Converter Evaluation Module

The ADS54J20EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J20 and LMK04828 clock jitter cleaner. The ADS54J20 is a low power, 12-bit, 1-GSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B interface. (...)
User guide: PDF
Not available on TI.com
Evaluation board

ADS54J40EVM — ADS54J40 Dual-Channel, 14-Bit, 1.0-GSPS Analog-to-Digital Converter Evaluation Module

The ADS54J40EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J40 and LMK04828 clock jitter cleaner. The ADS54J40 is a low power, 14-bit, 1-GSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B interface. (...)

User guide: PDF
Not available on TI.com
Evaluation board

ADS54J42EVM — ADS54J42 Dual-Channel, 14-Bit, 625-MSPS Analog-to-Digital Converter Evaluation Module

The ADS54J42EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J42 and LMK04828 clock jitter cleaner. The ADS54J42 is a low power, 14-bit, 625-GMSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B (...)
User guide: PDF
Not available on TI.com
Evaluation board

ADS54J69EVM — ADS54J69 Dual-Channel, 16-Bit, 500-MSPS Analog-to-Digital Converter Evaluation Module

The ADS54J69EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J69 and LMK04828 clock jitter cleaner. The ADS54J69 is a low power, 16-bit, 500-MSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B (...)

User guide: PDF
Not available on TI.com
Evaluation board

TPS7A8300EVM-209 — TPS7A8300 Low-Dropout Voltage Regulator Evaluation Module

The TPS7A8300EVM-209 evaluation module (EVM) helps designers evaluate the operation and performance of the TPS7A8300, 2-A Low-Dropout Voltage Regulator for High Speed Communication Systems. The EVM circuit is configured to be a reference design for engineering applications requiring current to a (...)
User guide: PDF
Not available on TI.com
Evaluation board

TPS7A8300EVM-579 — TPS7A8300 evaluation module for low-noise, high-accuracy, ultra-low-dropout voltage regulator

The TPS7A8300EVM-579 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A8300, 2-A low dropout voltage regulator for high speed communication systems.

The EVM circuit board is configured to be a reference design for engineering applications (...)

User guide: PDF
Not available on TI.com
Development kit

PMLKLDOEVM — TI-PMLK LDO experiment board using TPS7A4901 and TPS7A8300

Our TI-PMLK LDO experiment board is part of the TI Power Management Lab Kit (TI-PMLK) series. TI-PMLK series provides hands on learning to reinforce power supply knowledge. The modular format lets you customize the TI-PMLK series experience in a way that makes the most impact (...)

User guide: PDF
Not available on TI.com
Simulation model

SBAA346 Companion Simulations

SBAM414.ZIP (55 KB) - TINA-TI Reference Design
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Simulation model

TPS7A8300 PSpice Transient Model (Rev. B)

SBVM356B.ZIP (50 KB) - PSpice Model
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Simulation model

TPS7A8300 TINA-TI Transient Reference Design

SBVM380.TSC (57 KB) - TINA-TI Reference Design
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Simulation model

TPS7A8300 TINA-TI Transient Spice Model

SBVM381.ZIP (8 KB) - TINA-TI Spice Model
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Simulation model

TPS7A8300 Unencrypted PSpice Transient Model

SBVM525.ZIP (2 KB) - PSpice Model
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