TIDUE74F April   2018  – March 2026

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 C2000™ Real-Time MCU LaunchPad™ Development Kit
      2. 2.2.2 SN65HVD78
      3. 2.2.3 TLV702
      4. 2.2.4 TPS22918-Q1
    3. 2.3 Design Considerations
      1. 2.3.1 Tamagawa T-Format Protocol
      2. 2.3.2 C2000 T-Format Encoder Interface Overview
      3. 2.3.3 TIDM-1011 Board Implementation
      4. 2.3.4 MCU Resource Requirements
      5. 2.3.5 Device-Specific Resource Usage
        1. 2.3.5.1 CRC Calculations
        2. 2.3.5.2 Input, Output Signals, and CLB Tiles
      6. 2.3.6 CLB T-Format Implementation Details
        1. 2.3.6.1 Transaction Waveforms
          1. 2.3.6.1.1 IDLE State
          2. 2.3.6.1.2 TRANSMIT_DATA State
          3. 2.3.6.1.3 WAIT_FOR_START State
          4. 2.3.6.1.4 RECEIVE_DATA State
        2. 2.3.6.2 Communication Tile Design
        3. 2.3.6.3 Logic View
      7. 2.3.7 CLB Receive Data CRC Implementation
      8. 2.3.8 PM T-Format Encoder Interface Library
        1. 2.3.8.1 PM T-Format Reference Implementation Commands
        2. 2.3.8.2 Functions Supported in PM T-Format Reference Implementation
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware
      1. 3.1.1 TIDM-1011 Jumper Configuration
    2. 3.2 Software
      1. 3.2.1 C2000 Driver Library (DriverLib)
      2. 3.2.2 C2000 SysConfig
      3. 3.2.3 C2000 Configurable Logic Block Tool
      4. 3.2.4 Installing Code Composer Studio™ and C2000WARE-MOTORCONTROL-SDK
      5. 3.2.5 Locating the Reference Software
    3. 3.3 Testing and Results
      1. 3.3.1 Hardware Configuration
      2. 3.3.2 Building and Loading Project
      3. 3.3.3 Running Code
      4. 3.3.4 Cable Length Validation
      5. 3.3.5 Benchmarks
      6. 3.3.6 Troubleshooting
  10. 4Design Files
  11. 5Related Documentation
    1. 5.1 Trademarks
  12. 6Terminology
  13. 7About the Authors
  14. 8Revision History

2.3.6 CLB T-Format Implementation Details

The CLB communications tile is responsible for:

  • Clocking the SPI to transmit the request.
  • Monitoring the SPI SIMO pin for a response from the encoder.
  • Aligning the SPICLK to the incoming response.
  • Clocking the SPI to receive the response.

This section describes the design of the communication tile using three different approaches:

  1. Visualization of the CLB behavior during each phase of the transaction using waveforms.
  2. The CLB tile design including interconnect of the submodules.
  3. Using a logic schematic lens.