Examining the following waveforms can
assist in troubleshooting. Refer to the I/O diagrams in the design description:
- The CLB generated SPI clock.
- The output data from the SPI. This is the request to the encoder.
- The input data to the SPI. This is the response.
- The TxEN signal. This signal must be high during the request transmission.
- The encoder data signal (D+/D-)
between the RS485 line driver and the encoder. Note: The data is a differential
signal. Therefore, observation requires a special probe.
- If the request is not transmitted
by the SPI:
- Check the connection
between the SPICLK and the CLB. The CLB drives the SPI CLK. This
connection can be internal to the MCU on all devices except F2837xD. On
F2837xD this connection must be made externally.
- Observe the SPI registers
after the command setup and again after start operation. If the SPI
receives the clock, the TX FIFO level decreases while the RX FIFO level
increases.
- The encoder does not respond:
- Confirm TxEN is high during the request transmission.
- Check the SPI clock
frequency. The clock frequency must be 2.5 MHz for the encoder to
respond. If the clock is not 2.5 MHz, then check the frequency
configuration (TFORMAT_FREQ_DIVIDER) in the system example header
file.
- Check that the encoder is
properly powered. In some cases the LaunchPad is not able to supply the
current required by the encoder. Try providing power to the encoder
separately, making sure all grounds are tied together.
- The SPI CLK is observed during
transmit but not during the response time:
- Check the encoder's
connection to the test hardware.
- If you have modified the
design:
- Check that the
response pin is routed into the correct CLB tile and to the
correct input of that tile. The CLB must detect the encoder's
response. Only then does the CLB generate the CLB_SPI_CLK.
- If the CLB is
driving SPI CLK internally, check that the tile and tile output
enable are correct. Only certain tiles can access a specific SPI
module. This can change on different devices.