Top
RF-sampling 8-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS

ADC08DJ5200RF

ACTIVE

Product details

Parameters

Sample rate (Max) (MSPS) 5200, 10400 Resolution (Bits) 8 Number of input channels 2, 1 Interface type JESD204B, JESD204C Analog input BW (MHz) 8100 Features Ultra High Speed Rating Catalog Input range (Vp-p) 0.825 Power consumption (Typ) (mW) 3700 Architecture Folding Interpolating SNR (dB) 48.8 ENOB (Bits) 7.8 SFDR (dB) 65 Operating temperature range (C) -40 to 85 Input buffer Yes open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

FCBGA (AAV) 144 100 mm² 10 x 10 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • ADC core:
    • 8-bit resolution
    • Up to 10.4 GSPS in single-channel mode
    • Up to 5.2 GSPS in dual-channel mode
  • Performance specifications:
    • Noise floor (–20 dBFS, VFS = 1 VPP-DIFF):
      • Dual-channel mode: –143.4 dBFS/Hz
      • Single-channel mode: –146.2 dBFS/Hz
    • ENOB (dual channel, FIN = 2.4 GHz, TYP): 7.8 Bits
  • Buffered analog inputs with VCMI of 0 V:
    • Analog input bandwidth (–3 dB): 8.1 GHz
    • Usable input frequency range: > 10 GHz
    • Full-scale input voltage (VFS, default): 0.8 VPP
  • Noiseless aperture delay (tAD) adjustment:
    • Precise sampling control: 19-fs Step
    • Simplifies synchronization and interleaving
    • Temperature and voltage invariant delays
  • Easy-to-use synchronization features:
    • Automatic SYSREF timing calibration
    • Timestamp for sample marking
  • JESD204C serial data interface:
    • Maximum lane rate: 17.16 Gbps
    • Support for 64b/66b and 8b/10b encoding
    • 8b/10b modes are JESD204B compatible
  • Peak RF Input Power (Diff): +26.5 dBm (+ 27.5 dBFS, 560x fullscale power)
  • Programmable FIR filter for equalization
  • Power consumption: 3.8 W
  • Power supplies: 1.1 V, 1.9 V
open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADC08DJ5200RF device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that directly samples input frequencies from DC to above 10 GHz. The ADC08DJ5200RF can be configured as a dual-channel, 5.2 GSPS ADC or single-channel, 10.4 GSPS ADC. Support of a useable input frequency range of up to 10 GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.

The ADC08DJ5200RF uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16 Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers.

Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multi-channel applications. A programmable FIR filter allows on-chip equalization.

open-in-new Find other High-speed ADCs (>10MSPS)
Download

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 6
Type Title Date
* Data sheet ADC08DJ5200RF 10.4-GSPS Single-Channel or 5.2-GSPS Dual-Channel, 8-bit, RF-Sampling Analog-to-Digital Converter (ADC) datasheet Mar. 08, 2018
User guide ADCxxDJxx00RF Evaluation Module User's Guide (Rev. A) Jun. 28, 2021
Technical article Keys to quick success using high-speed data converters Oct. 13, 2020
Technical article How to achieve fast frequency hopping Mar. 03, 2019
Technical article RF sampling: Learning more about latency Feb. 09, 2017
Technical article Why phase noise matters in RF sampling converters Nov. 28, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
1999
Description

The ADC08DJ5200RF evaluation module (EVM) is a platform for evaluating the ADC08DJ5200RF. ADC08DJ5200RF is a low-power, 8-bit, dual-channel 5.2-GSPS or single-channel 10.4-GSPS, RF-sampling analog-to-digital converter (ADC) with a buffered analog input and integrated digital downconverter, which (...)

Features
  • Flexible transformer-coupled analog input allows for a variety of sources and frequencies
  • Easy-to-use software GUI controls ADC08DJ5200RF, LMX2594 and LMK04828 in a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through high-speed data converter pro software (...)

Software development

FIRMWARE Download
JESD204 Rapid Design IP for FPGAs connected to TI high-speed data converters
TI-JESD204-IP The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
Features
  • Compatible with JEDEC JESD204a/b/c protocols
  • Supports subclass 1 deterministic latency and multidevice synchronization
  • Supported lane rates
    • Up to 16.375 Gbps in 8b/10b mode
    • Up to 20 Gbps in 64b/66b mode
  • Supports all protocol related error detection and reporting features
  • Integrated transport layer (...)

Design tools & simulation

SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
FCBGA (AAV) 144 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos