CD4066B

ACTIVE

10-pA, 20-V, 1:1 (SPST), 4-channel analog switch

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Product details

Parameters

Configuration 1:1 SPST Number of channels (#) 4 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Ron (Typ) (Ohms) 125 Bandwidth (MHz) 40 Operating temperature range (C) -55 to 125 Input/output continuous current (Max) (mA) 10 Rating Catalog CON (Typ) (pF) 8 Supply current (Typ) (uA) 0.01 open-in-new Find other Analog switches & muxes

Package | Pins | Size

PDIP (N) 14 181 mm² 19.3 x 9.4 SOIC (D) 14 52 mm² 8.65 x 6 SOP (NS) 14 80 mm² 10.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other Analog switches & muxes

Features

  • 15-V Digital or ±7.5-V Peak-to-Peak Switching
  • 125-Ω Typical On-State Resistance for
    15-V Operation
  • Switch On-State Resistance Matched to Within
    5 Ω Over 15-V Signal-Input Range
  • On-State Resistance Flat Over Full
    Peak-to-Peak Signal Range
  • High On or Off Output-Voltage Ratio:
    80 dB Typical at fis = 10 kHz, RL = 1 kΩ
  • High Degree of Linearity: <0.5% Distortion Typical at fis = 1 kHz, Vis = 5-Vp-p
    VDD – VSS ≥ 10-V, RL = 10 kΩ
  • Extremely Low Off-State Switch Leakage, Resulting in Very Low Offset Current and High Effective Off-State Resistance: 10 pA Typical at VDD – VSS = 10-V, TA = 25°C
  • Extremely High Control Input Impedance
    (Control Circuit Isolated From Signal Circuit):
    1012 Ω Typical
  • Low Crosstalk Between Switches: –50 dB Typical at fis = 8 MHz, RL = 1 kΩ
  • Matched Control-Input to Signal-Output Capacitance: Reduces Output Signal Transients
  • Frequency Response,
    Switch On = 40 MHz Typical
  • 100% Tested for Quiescent Current at 20-V
  • 5-V, 10-V, and 15-V Parametric Ratings

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Description

The CD4066B device is a quad bilateral switch intended for the transmission or multiplexing of analog or digital signals. It is pin-for-pin compatible with the CD4016B device, but exhibits a much lower on-state resistance. In addition, the on-state resistance is relatively constant over the full signal-input range.

The CD4066B device consists of four bilateral switches, each with independent controls. Both the p and the n devices in a given switch are biased on or off simultaneously by the control signal. As shown in Figure 17, the well of the n-channel device on each switch is tied to either the input (when the switch is on) or to VSS (when the switch is off). This configuration eliminates the variation of the switch-transistor threshold voltage with input signal and, thus, keeps the on-state resistance low over the full operating-signal range.

The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold applications, the CD4016B device is recommended.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet CD4066B CMOS Quad Bilateral Switch datasheet (Rev. H) Feb. 28, 2020
Application note Selecting the Right Texas Instruments Signal Switch (Rev. B) Apr. 02, 2020
Application note Multiplexers and Signal Switches Glossary Mar. 06, 2020
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics Dec. 03, 2001

Design & development

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Hardware development

INTERFACE ADAPTER Download
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Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


CAD/CAE symbols

Package Pins Download
PDIP (N) 14 View options
SO (NS) 14 View options
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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  • Ongoing reliability monitoring

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