CD74HC109
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High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset

High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset - CD74HC109
Datasheet
 

Datasheet (1)

Title Type Size (KB) Date
PDF 459 13 Oct 2003

User guides (1)

Title Type Size (KB) Date
PDF 18396 14 Nov 2003

Selection & solution guides  (2)

Title Type Size (KB) Date
PDF 4882 12 Jun 2017
PDF 5439 16 Jan 2007

More literature (2)

Title Type Size (KB) Date
PDF 501 11 May 2004
PDF 2938 07 Oct 2003