Product details

Number of channels 2 Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Technology family HCT Input type Standard CMOS Output type Push-Pull Supply current (µA) 80 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Retriggerable Operating temperature range (°C) -55 to 125 Rating Catalog
Number of channels 2 Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Technology family HCT Input type Standard CMOS Output type Push-Pull Supply current (µA) 80 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Retriggerable Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • Overriding Reset Terminates Output Pulse
  • Triggering From the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt Trigger on Both A\ and B Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

  • Overriding Reset Terminates Output Pulse
  • Triggering From the Leading or Trailing Edge
  • Q and Q\ Buffered Outputs
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt Trigger on Both A\ and B Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

The ’HC123, ’HCT123, CD74HC423 and CD74HCT423 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of Rx and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the A\ and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses.

Once triggered, the output pulse width may be extended by retriggering inputs A\ and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A)\ and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A\, B, and R\) must be terminated high or low.

The minimum value of external resistance, Rx is typically 5k. The minimum value external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.45 RXCX at VCC = 5V.

The ’HC123, ’HCT123, CD74HC423 and CD74HCT423 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of Rx and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the A\ and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses.

Once triggered, the output pulse width may be extended by retriggering inputs A\ and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A)\ and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A\, B, and R\) must be terminated high or low.

The minimum value of external resistance, Rx is typically 5k. The minimum value external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.45 RXCX at VCC = 5V.

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* Data sheet CD54/74HC123, CD54/74HCT123, CD74HC423, CD74HCT423 datasheet (Rev. F) 13 Oct 2003

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