DAC5688

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Dual-Channel, 16-Bit, 800-MSPS, 1x-8x Interpolating Digital-to-Analog Converter (DAC)

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Product details

Parameters

Resolution (Bits) 16 Number of DAC channels (#) 2 Interface type Parallel CMOS Sample/update rate (MSPS) 800 Features High Performance Rating Catalog Interpolation 1x, 2x, 4x, 8x Power consumption (Typ) (mW) 1750 SFDR (dB) 83 Architecture Current Sink Operating temperature range (C) -40 to 85 Reference type Int open-in-new Find other High-speed DACs (>10MSPS)

Package | Pins | Size

VQFN (RGC) 64 81 mm² 9 x 9 open-in-new Find other High-speed DACs (>10MSPS)

Features

  • Dual, 16-Bit, 800 MSPS DACs
  • Dual, 16-Bit, 250 MSPS CMOS Input Data
    • 16 Sample Input FIFO
    • Flexible input data bus options
  • High Performance
    • 81 dBc ACLR WCDMA TM1 at 70 MHz
  • 2x-32x Clock Multiplying PLL/VCO
  • Selectable 2x–8x Interpolation Filters
    • Stop-band Attenuation > 80 dB
  • Complex Mixer with 32-Bit NCO
  • Digital Quadrature Modulator Correction
    • Gain, Phase and Offset Correction
  • Digital Inverse SINC Filter
  • 3- or 4-Wire Serial Control Interface
  • On Chip 1.2-V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-pin 9×9mm QFN
  • APPLICATIONS
    • Cellular Base Stations
    • Broadband Wireless Access (BWA)
    • WiMAX 802.16
    • Fixed Wireless Backhaul
    • Cable Modem Termination System (CMTS)

open-in-new Find other High-speed DACs (>10MSPS)

Description

The DAC5688 is a dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with dual CMOS digital data bus, integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled oscillator (NCO), on-board clock multiplier, IQ compensation, and internal voltage reference. Different modes of operation enable or bypass various signal processing blocks. The DAC5688 offers superior linearity, noise, crosstalk and PLL phase noise performance.

The DAC5688 dual CMOS data bus provides 250 MSPS input data transfer per DAC channel. Several input data options are available: dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing. Input data can interpolated 2x, 4x or 8x by on-board digital interpolating FIR filters with over 80 dB of stop-band attenuation.

The DAC5688 allows both complex or real output. An optional 32-bit NCO/mixer in complex mode provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A digital Inverse SINC filter compensates for natural DAC sin(x)/x frequency roll-off. The digital Quadrature Modulator Correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection and minimize LO feed-through of an external quadrature modulator performing the final single sideband RF up-conversion.

The DAC5688 is pin compatible with the DAC5689 which does not include a clock-multiplying PLL. The DAC5688 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin 9x9mm QFN package.

open-in-new Find other High-speed DACs (>10MSPS)
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Technical documentation

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Type Title Date
* Data sheet 16-Bit, 800 MSPS 2x–8x Interpolating Dual-Channel Digital-to-Analog Converter (D datasheet (Rev. C) Aug. 19, 2010
Technical article Keys to quick success using high-speed data converters Oct. 13, 2020
Application note Q3 2009 Issue Analog Applications Journal Sep. 24, 2018
Technical article Digital signal processing in RF sampling DACs – part 2 Apr. 04, 2017
Technical article Digital signal processing in RF sampling DACs - part 1 Feb. 13, 2017
Technical article Why phase noise matters in RF sampling converters Nov. 28, 2016
User guide DAC5668/88/89 EVM (Rev. A) Mar. 19, 2010
Application note Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs Jul. 14, 2009
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio Apr. 28, 2009
Application note Passive Terminations for Current Output DACs Nov. 10, 2008
User guide TSW4100EVM User's Guide (Rev. A) Sep. 16, 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
499
Description

The DAC5688EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x/8x interpolation filters, on-board clock multiplier and PLL, 32-bit NCO and (...)

Features
  • Comprehensive test capability for DAC5688
  • Direct connection to TSW3100 signal generator EVM
  • Has a programmable Low Jitter Clock Synthesizer capable of working with a VCXO or an external clock source
  • Clock synchronization with TSW3100 for signal integrity
  • Software support with a fully featured GUI for (...)

Software development

SUPPORT SOFTWARE Download
DAC5688EVM Software
DAC5688EVM-SW — The DAC5688 EVM software GUI allows for programming control of the DAC5688.

Design tools & simulation

SIMULATION MODEL Download
SLAC178A.ZIP (14 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
CALCULATION TOOL Download
SLAC170.ZIP (26 KB)

CAD/CAE symbols

Package Pins Download
VQFN (RGC) 64 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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