16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC)
Product details
Parameters
Package | Pins | Size
Features
- 16-Bit Digital-to-Analog Converter (DAC)
- 1.0 GSPS Update Rate
- 16-Bit Wideband Input LVDS Data Bus
- 8 Sample Input FIFO
- High Performance
- 73-dBc ACLR WCDMA TM1 at 180 MHz
- 2x to 32x Clock Multiplying PLL/VCO
- 2x or 4x Interpolation Filters
- Stopband Transition 0.4–0.6 Fdata
- Filters Configurable in Either Low-Pass or
High-Pass Mode- Allows Selection of Higher Order Image
- On-Chip 1.2-V Reference
- 2 to 20-mA Differential Scalable Output
- 64-Pin 9-mm × 9-mm VQFN Package
- APPLICATIONS
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)
All other trademarks are the property of their respective owners
Description
The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.
The DAC5681Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.
The DAC5681Z is characterized for operation over the industrial temperature range of 40°C to 85°C and is available in a 64-pin VQFN package. Other members of the family include the dual-channel, interpolating DAC5682Z and the single-channel, non-interpolating DAC5681.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The DAC5681ZEVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' single-channel 16-bit 1.0 GSPS digital-to-analog converter (DAC) featuring a fll 1GSPS DDR LVDS interface, integrated 2x/4x interpolation filters, on-board clock multiplier and internal voltage (...)
Features
- Comprehensive test capability for DAC5681Z
- Direct connection to TSW3100 signal generator EVM
- Has a programmable Low Jitter Clock Synthesizer capable of working with a VCXO or an external clock source
- Clock synchronization with TSW3100 for signal integrity
- Software support with a fully featured GUI for (...)
Description
Description
Description
Features
- Enables direct connection to TI high speed DAC EVM LVDS inputs from the FMC standard header
Software development
Features
- Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
- Works with all TI high-speed DAC, ADC, and AFE products
- Provides time-domain and frequency-domain analysis
- Supports single-tone, multi-tone, and modulated (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
VQFN (RGC) | 64 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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