DAC5682Z

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Dual-Channel, 16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC)

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Product details

Parameters

Resolution (Bits) 16 DAC channels 2 Interface Parallel LVDS Sample/update rate (MSPS) 1000 Features Ultra High Speed Rating Catalog Interpolation 1x, 2x, 4x Power consumption (Typ) (mW) 1300 SFDR (dB) 81 Architecture Current Sink Operating temperature range (C) -40 to 85 Reference: type Int open-in-new Find other High-speed DACs (>10MSPS)

Package | Pins | Size

VQFN (RGC) 64 81 mm² 9 x 9 open-in-new Find other High-speed DACs (>10MSPS)

Features

  • 16-Bit Digital-to-Analog Converter (DAC)
  • 1.0 GSPS Update Rate
  • 16-Bit Wideband Input LVDS Data Bus
    • 8 Sample Input FIFO
    • Interleaved I/Q Data for Dual-DAC Mode
  • High Performance
    • 73-dBc ACLR WCDMA TM1 at 180 MHz
  • 2x-32x Clock Multiplying PLL/VCO
  • 2x or 4x Interpolation Filters
    • Stopband Transition 0.4 to 0.6 Fdata
    • Filters Configurable in Either Low-Pass or High-Pass
      Mode Allows Selection of Higher Order Image
  • Fs/4 Coarse Mixer
  • On-Chip 1.2-V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-Pin 9-mm × 9-mm QFN
  • APPLICATIONS
    • Cellular Base Stations
    • Broadband Wireless Access (BWA)
    • WiMAX 802.16
    • Fixed Wireless Backhaul
    • Cable Modem Termination System (CMTS)

All other trademarks are the property of their respective owners

open-in-new Find other High-speed DACs (>10MSPS)

Description

The DAC5682Z is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.

The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The DAC5682Z allows both complex or real output. An optional Fs/4 coarse mixer in complex mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. An external RF quadrature modulator then performs the final single sideband up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency plan flexibility while enabling higher output DAC rates to simplify image rejection filtering.

The DAC5682Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. Other single-channel members of the family include the interpolating DAC5681Z and the noninterpolating DAC5681.

open-in-new Find other High-speed DACs (>10MSPS)
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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet DAC5682Z 16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-to-Analog Converter (DAC) datasheet (Rev. F) Jan. 20, 2015
Application notes Q3 2009 Issue Analog Applications Journal Sep. 24, 2018
Technical articles Digital signal processing in RF sampling DACs – part 2 Apr. 04, 2017
Technical articles Digital signal processing in RF sampling DACs - part 1 Feb. 13, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016
User guides TSW3100 High Speed Digital Pattern Generator. (Rev. C) May 26, 2016
User guides TSW3070EVM: Amplifier Interface to Current Sink DAC - (Rev. A) May 23, 2016
Technical articles RF sampling: frequency planning yields a clean spectrum Nov. 18, 2015
User guides Wide-Bandwidth and High-Voltage Arbitrary Waveform Generator Front End Sep. 03, 2013
Application notes High Speed, Digital-to-Analog Converters Basics (Rev. A) Oct. 23, 2012
User guides TSW1400 Pattern Generators May 03, 2012
User guides GC5325 System Evaluation Kit (Rev. F) Apr. 20, 2011
Application notes Design of Differential Filters for High-Speed Signal Chains (Rev. B) Apr. 30, 2010
Application notes Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs Jul. 14, 2009
Application notes Passive Terminations for Current Output DACs Nov. 10, 2008
Application notes CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters Jun. 08, 2008
Application notes Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 Jun. 02, 2008

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
499
Description
The DAC5681EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' single-channel 16-bit 1.0 GSPS digital-to-analog converter (DAC) featuring a fll 1GSPS DDR LVDS interface. The EVM provides a flexible environment to test the DAC5681 under a variety of clock (...)
Features
Comprehensive test capability for DAC5681 Direct connection to TSW3100 signal generator EVM Programmable Low Jitter Clock Synthesizer capable of working with a VCXO or an external clock source Clock synchronization with TSW3100 for signal integrity Software support with a fully featured GUI for easy (...)
EVALUATION BOARDS Download
document-generic User guide
Description

The DAC5681ZEVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' single-channel 16-bit 1.0 GSPS digital-to-analog converter (DAC) featuring a fll 1GSPS DDR LVDS interface, integrated 2x/4x interpolation filters, on-board clock multiplier and internal voltage (...)

Features
  • Comprehensive test capability for DAC5681Z
  • Direct connection to TSW3100 signal generator EVM
  • Has a programmable Low Jitter Clock Synthesizer capable of working with a VCXO or an external clock source
  • Clock synchronization with TSW3100 for signal integrity
  • Software support with a fully featured GUI for (...)
EVALUATION BOARDS Download
199
Description

The TRF3703-17EVM evaluation module (EVM) is intended for the evaluation of the TRF3703-17 direct-launch quadrature modulator for applications in the transmit path of base stations and communications equipment.

Features

The TRF3703-17EVM comes configured for differential I/Q input signals via four SMA connectors. There is an on board SMA connector which is used to monitor the RF output signal from the quadrature modulator. The LO signal is provided through an SMA connector as well.

EVALUATION BOARDS Download
Abaco Systems® FMC204 FPGA mezzanine card
Provided by Abaco Systems
Description
The FMC204 is a quad channel D/A FMC daughter card. The card is based on TI's DAC5681Z dual channel 16-bit 1 Gsps device. The FMC204 daughter card is mechanically and electrically compliant to FMC standard (ANSI/VITA 57.1). The FMC204 has a high-pin count connector, front panel I/O, and can be used (...)
GUIS FOR EVALUATION MODULES (EVM) Download
SLAC497A.ZIP (59041 KB)
GUIS FOR EVALUATION MODULES (EVM) Download
SLLC420B.ZIP (199990 KB)
INTERFACE ADAPTERS Download
49
Description
The FMC-DAC-Adapter passive interconnect board enables the output of TI’s LVDS input high speed DACs to be directly connected to a standard FMC interconnect header, a typical input on the latest Xilinx FPGA EVMs. This enables users of TI’s high speed DAC EVMs to directly interface to Xilinx (...)
Features
  • Enables direct connection to TI high speed DAC EVM LVDS inputs from the FMC standard header

Software development

SUPPORT SOFTWARE Download
High-speed data converter pro software
DATACONVERTERPRO-SW This high-speed data converter pro GUI is a PC (Windows® XP/7 compatible) program designed to aid in evaluation of most TI high-speed data converter and analog front-end (AFE) platforms. Designed to support the entire TSW14xxx series of data-capture and pattern-generation cards (...)
Features
  • Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
  • Works with all TI high-speed DAC, ADC, and AFE products
  • Provides time-domain and frequency-domain analysis
  • Supports single-tone, multi-tone, and modulated (...)

Design tools & simulation

SIMULATION MODELS Download
SLLC320A.ZIP (7 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
CALCULATION TOOLS Download
SLAC169.ZIP (33 KB)

Reference designs

REFERENCE DESIGNS Download
LIDAR-Pulsed Time-of-Flight Reference Design Using High-Speed Data Converters
TIDA-01187 — Time-of-flight (ToF) optical methods for measuring distance with high precision are utilized in a variety of applications, such as laser safety scanners, range finders, drones, and guidance systems. This design details the advantages of a high-speed data-converter-based solution, including target (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Wide-Bandwidth and High-Voltage Arbitrary Waveform Generator Front End
TIDA-00075 This design shows how to use an active interface with the current sink output of the DAC5682Z - typical applications for this include front ends for arbitrary waveform generators. The EVM includes the DAC5682Z for digital-to-analog conversion, an OPA695 to demonstrate an active interface (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
VQFN (RGC) 64 View options

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