Dual-Channel, 16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC)
Product details
Parameters
Package | Pins | Size
Features
- 16-Bit Digital-to-Analog Converter (DAC)
- 1.0 GSPS Update Rate
- 16-Bit Wideband Input LVDS Data Bus
- 8 Sample Input FIFO
- Interleaved I/Q Data for Dual-DAC Mode
- High Performance
- 73-dBc ACLR WCDMA TM1 at 180 MHz
- 2x-32x Clock Multiplying PLL/VCO
- 2x or 4x Interpolation Filters
- Stopband Transition 0.4 to 0.6 Fdata
- Filters Configurable in Either Low-Pass or High-Pass
Mode Allows Selection of Higher Order Image
- Fs/4 Coarse Mixer
- On-Chip 1.2-V Reference
- Differential Scalable Output: 2 to 20 mA
- Package: 64-Pin 9-mm × 9-mm QFN
- APPLICATIONS
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)
All other trademarks are the property of their respective owners
Description
The DAC5682Z is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.
The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.
The DAC5682Z allows both complex or real output. An optional Fs/4 coarse mixer in complex mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. An external RF quadrature modulator then performs the final single sideband up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency plan flexibility while enabling higher output DAC rates to simplify image rejection filtering.
The DAC5682Z is characterized for operation over the industrial temperature range of 40°C to 85°C and is available in a 64-pin QFN package. Other single-channel members of the family include the interpolating DAC5681Z and the noninterpolating DAC5681.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
Description
The DAC5681ZEVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' single-channel 16-bit 1.0 GSPS digital-to-analog converter (DAC) featuring a fll 1GSPS DDR LVDS interface, integrated 2x/4x interpolation filters, on-board clock multiplier and internal voltage (...)
Features
- Comprehensive test capability for DAC5681Z
- Direct connection to TSW3100 signal generator EVM
- Has a programmable Low Jitter Clock Synthesizer capable of working with a VCXO or an external clock source
- Clock synchronization with TSW3100 for signal integrity
- Software support with a fully featured GUI for (...)
Description
The TRF3703-17EVM evaluation module (EVM) is intended for the evaluation of the TRF3703-17 direct-launch quadrature modulator for applications in the transmit path of base stations and communications equipment.
Features
The TRF3703-17EVM comes configured for differential I/Q input signals via four SMA connectors. There is an on board SMA connector which is used to monitor the RF output signal from the quadrature modulator. The LO signal is provided through an SMA connector as well.
Description
Description
Features
- Enables direct connection to TI high speed DAC EVM LVDS inputs from the FMC standard header
Software development
Features
- Compatible with TSW1400, TSW1405, TSW1406 and TSW14J10, TSW14J50, TSW14J56, and TSW14J57 pattern-generation and data-capture platforms
- Works with all TI high-speed DAC, ADC, and AFE products
- Provides time-domain and frequency-domain analysis
- Supports single-tone, multi-tone, and modulated (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
-
download TIDA-01187 BOM.pdf (54KB) -
download TIDA-01187 Assembly Drawing.pdf (48KB) -
download TIDA-01187 PCB.pdf (212KB) -
download TIDA-01187 CAD Files.zip (303KB) -
download TIDA-01187 Gerber.zip (105KB)
Design files
-
download TIDA-00075 BOM.pdf (57KB) -
download TIDA-00075 Layer Plots.zip (3997KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
VQFN (RGC) | 64 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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