Product details

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Catalog Operating temperature range (C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Catalog Operating temperature range (C) -40 to 85
SOIC (D) 16 59 mm² 9.9 x 6
  • >155.5 Mbps (77.7 MHz) switching rates
  • Accepts small swing (350 mV) differential signal levels
  • Ultra low power dissipation
  • 600 ps maximum differential skew (5V, 25°C)
  • 6.0 ns maximum propagation delay
  • Industrial operating temperature range
  • Military operating temperature range option
  • Available in surface mount packaging (SOIC) and (LCCC)
  • Pin compatible with DS26C32A, MB570 (PECL), and 41LF (PECL)
  • Supports OPEN input fail-safe
  • Supports short and terminated input fail-safe with the addition of external failsafe biasing
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Conforms to ANSI/TIA/EIA-644 LVDS standard
  • Available to Standard Microcircuit Drawing (SMD) 5962-95834

All trademarks are the property of their respective owners.

  • >155.5 Mbps (77.7 MHz) switching rates
  • Accepts small swing (350 mV) differential signal levels
  • Ultra low power dissipation
  • 600 ps maximum differential skew (5V, 25°C)
  • 6.0 ns maximum propagation delay
  • Industrial operating temperature range
  • Military operating temperature range option
  • Available in surface mount packaging (SOIC) and (LCCC)
  • Pin compatible with DS26C32A, MB570 (PECL), and 41LF (PECL)
  • Supports OPEN input fail-safe
  • Supports short and terminated input fail-safe with the addition of external failsafe biasing
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Conforms to ANSI/TIA/EIA-644 LVDS standard
  • Available to Standard Microcircuit Drawing (SMD) 5962-95834

All trademarks are the property of their respective owners.

TheDS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.

TheDS90C032 accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN, shorted, and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

TheDS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.

TheDS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.

TheDS90C032 accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN, shorted, and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

TheDS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.

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Technical documentation

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Type Title Date
* Data sheet DS90C032 LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) 12 Apr 2013
Application note How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application note How to Terminate LVDS Connections with DC and AC Coupling 16 May 2018
More literature Die D/S DS90C032 MD8 MW8 LVDS Quad CMOS Differential Line Receiver 20 Dec 2012
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency 15 May 2004
Application note An Overview of LVDS Technology 05 Oct 1998

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