LSF0108

ACTIVE

Octal bidirectional multi-voltage-level translator

Product details

Technology family LSF Applications I2C Bits (#) 8 Data rate (max) (Mbps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LSF Applications I2C Bits (#) 8 Data rate (max) (Mbps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RKS) 20 11.25 mm² 4.5 x 2.5 VSSOP (DGS) 20 24.99 mm² 5.1 x 4.9
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.65 V ↔ 1.8/2.5/3.3/5 V
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.65 V ↔ 1.8/2.5/3.3/5 V
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels on each channel which makes it very flexible.

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels on each channel which makes it very flexible.

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Technical documentation

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

LSF-EVM — 1 to 8-bit LSF Translator Family Evaluation Module

The LSF family of devices are level translators that support a voltage range of 0.95V and 5V and provide multi-voltage bidirectional translation without a direction pin.

The LSF-EVM comes populated with the LSF0108PWR device and has landing patterns that are compatible with the LSF0101DRYR, (...)

User guide: PDF
Not available on TI.com
Simulation model

LSF0108 IBIS Model (Rev. A)

SDLM022A.ZIP (56 KB) - IBIS Model
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 20 Ultra Librarian
VQFN (RKS) 20 Ultra Librarian
VSSOP (DGS) 20 Ultra Librarian

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