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Product details

Parameters

Features Enable Pin Frequency (Max) (kHz) 400 VCCA (Min) (V) 1.2 VCCA (Max) (V) 5.5 VCCB (Min) (V) 1.8 VCCB (Max) (V) 5.5 Supply restrictions VCCA <= VCCB Approx. price (US$) 0.21 | 1ku Rating Automotive Operating temperature range (C) -40 to 105 open-in-new Find other I2C level shifters, buffers & hubs

Package | Pins | Size

VSSOP (DCU) 8 6 mm² 2 x 3.1 open-in-new Find other I2C level shifters, buffers & hubs

Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C4B
  • 2-Bit Bidirectional Translator for SDA and SCL
    Lines in Mixed-Mode I2C Applications
  • Compatible With I2C and SMBus
  • Less Than 1.5-ns Maximum Propagation Delay to
    Accommodate Standard-Mode and Fast-Mode I2C
    Devices and Multiple Masters
  • Allows Voltage-Level Translation Between
    • 1.2-V VREF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V
      VREF2
    • 1.8-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2
    • 2.5-V VREF1 and 3.3-V, or 5-V VREF2
    • 3.3-V VREF1 and 5-V VREF2
  • Provides Bidirectional Voltage Translation With No
    Direction Pin
  • Low 3.5-Ω ON-State Connection Between Input and
    Output Ports Provides Less Signal Distortion
  • Open-Drain I2C I/O Ports (SCL1, SDA1, SCL2,
    and SDA2)
  • 5-V Tolerant I2C I/O Ports to Support Mixed-Mode
    Signal Operation
  • High-Impedance SCL1, SDA1, SCL2, and SDA2
    Pins for EN = Low
  • Lock-Up-Free Operation for Isolation When
    EN = Low
  • Flow-Through Pinout for Ease of Printed-Circuit
    Board Trace Routing
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
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Description

This dual bidirectional I2C and SMBus voltage-level translator, with an enable (EN) input, is operational from 1.2-V to 3.3-V VREF1 and 1.8-V to 5.5-V VREF2.

The PCA9306-Q1 allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (ron) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports.

In I2C applications, the bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9306-Q1 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace length can be accommodated.

The PCA9306-Q1 also can be used to run two buses, one at 400-kHz operating frequency and the other at 100-kHz operating frequency. If the two buses are operating at different frequencies, the 100-kHz bus must be isolated when the 400-kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.

All channels have the same electrical characteristics, and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, because the fabrication of the switch is symmetrical. The translator provides excellent ESD protection to lower-voltage devices and at the same time protects less ESD-resistant devices.

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Technical documentation

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Type Title Date
* Datasheet PCA9306-Q1 Dual Bidirectional I2C Bus and SMBus Voltage-Level Translator datasheet (Rev. B) Feb. 08, 2016
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Choosing the Correct I2C Device for New Designs Sep. 07, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Application notes Understanding the I2C Bus Jun. 30, 2015
Application notes Maximum Clock Frequency of I2C Bus Using Repeaters May 15, 2015
Application notes I2C Bus Pull-Up Resistor Calculation Feb. 13, 2015
Selection guides I2C Guide (Rev. E) Oct. 10, 2013
Application notes Programming Fun Lights With TI's TCA6507 Nov. 30, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$49.00
Description
This EVM can be used to evaluate the PCA9306 product in the DCU package. The I2C buses are easily accessed via SDA_1, SCL_1, SDA_2, and SCL_2 test points, and symmetrically laid out for optimal performance. All IC signals are available through test point connections.
Features
  • Access to VDPU1, VDPU2, EN, SDA1, SCL1, SDA2, and SCL2 pins
  • Footprint for a socket for evaluating multiple PCA9306 devices
  • Footprints to test different capacitive loads
  • Footprints to test different pullup resistor values
  • Different load options allow for the testing of different translator configurations (...)

Design tools & simulation

SIMULATION MODELS Download
SCEJ212A.ZIP (81 KB) - HSpice Model
SIMULATION MODELS Download
SCPM002A.ZIP (54 KB) - IBIS Model
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
DESIGN TOOLS Download
I2C designer tool
I2C-DESIGNER — Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard with (...)
Features
  • GUI-based web application
  • Exportable designs
  • JSON file uploader
  • Bill of materials generator

Reference designs

REFERENCE DESIGNS Download
Cascade imaging radar capture reference design using Jacinto™ ADAS processor
TIDEP-01017 The cascade development kit has two main use cases:
  1. To use the MMWCAS-DSP-EVM as a capture card to fully evaluate the AWR2243 four-chip cascade performance by using the mmWave studio tool, please read the TIDEP-01012 design guide.
  2. To use the MMWCAS-DSP-EVM to develop radar real time SW application (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
ADAS Sensor Interconnect Reference Design Board for Remote Camera and Radar Modules
TIDA-00271 The ADAS Sensor Interconnect Board is intended for applications where remote sensors like cameras, LIDAR or radar modules need to be connected to a central processing ECU. The board supports up to 3 coaxial and 1 LVDS twisted pair data inputs as well as 3 FMC cable and 1 board to board connector as (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
VSSOP (DCU) 8 View options

Ordering & quality

Support & training

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