SN54S175 Quadruple D-type Flip-Flops With Clear | TI.com

SN54S175 (ACTIVE) Quadruple D-type Flip-Flops With Clear

Quadruple D-type Flip-Flops With Clear - SN54S175
Datasheet
 

Description

These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.

These circuits are fully compatible for use with most TTL circuits.

Features

  • '174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs
  • '175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail Outputs
  • Three Performance Ranges Offered: See Table Lower Right
  • Buffered Clock and Direct Clear Inputs
  • Individual Data Input to Each Flip-Flop
  • Applications include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

Parametrics

Compare all products in D-type flip-flop Email Download to Excel
Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Bits (#) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) IOL (Max) (mA) IOH (Max) (mA) 3-state output Rating Operating temperature range (C)
SN54S175 Order now S     4.75     5.25     4     5     50     96     17     20     -1     No     Military     -55 to 125    
SN74S175 Samples not available S     4.75     5.25     4     5     50     96     17     20     -1     No     Catalog     0 to 70