SN65MLVD200A

• Low-Voltage Differential 30-Ω to 55-Ω Line Drivers
  and Receivers for Signaling Rates⁽¹⁾ up to
  100 Mbps, Clock Frequencies up to 50 MHz
• Type-1 Receivers Incorporate 25 mV of
  Hysteresis (SN65MLVD200A, SN65MLVD202A)
• Type-2 Receivers Provide an Offset (100 mV)
  Threshold to Detect Open-Circuit and Idle-Bus
  Conditions (SN65MLVD204A, SN65MLVD205A)
• Meets or Exceeds the M-LVDS Standard
  TIA/EIA-899 for Multipoint Data Interchange
• Controlled Driver Output Voltage Transition Times
  for Improved Signal Quality
• –1 V to 3.4 V of Common-Mode Voltage Range
  Allows Data Transfer With 2 V of Ground Noise
• Bus Pins High Impedance When Disabled
  or V_CC ≤ 1.5 V
• 200-Mbps Devices Available (SN65MLVD201,
  SN65MLVD203, SN65MLVD206, SN65MLVD207)
• Bus Pin ESD Protection Exceeds 8 kV
• Packages Available:
  • 8-Pin SOIC
    SN65MLVD200A, SN65MLVD204A
  • 14-Pin SOIC
    SN65MLVD202A, SN65MLVD205A
• Improved Alternatives to the SN65MLVD200,
  SN65MLVD202A, SN65MLVD204A, and
  SN65MLVD205A Devices

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.