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High noise immunity 100-Mbps M-LVDS transceiver

SN65MLVD204B

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Product details

Parameters

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (C) -40 to 125, -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 WQFN (RUM) 16 16 mm² 4 x 4 open-in-new Find other LVDS, M-LVDS & PECL ICs
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Technical documentation

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Type Title Date
* Data sheet SN65MLVD204B Multipoint-LVDS Line Drivers and Receivers (Transceivers) With IEC datasheet (Rev. C) Sep. 04, 2020
Application note How Far, How Fast Can You Operate MLVDS? Aug. 06, 2018
Technical article Why should you care about the noise immunity of MLVDS drivers and receivers? Jul. 26, 2017
Technical article Get Connected: LVDS for multipoint applications Apr. 16, 2014
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. B) Apr. 26, 2013
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) Nov. 20, 2001

Design & development

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Hardware development

EVALUATION BOARD Download
document-generic User guide
149
EVALUATION BOARD Download
document-generic User guide
99
Description
This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
Features
  • Can combine MLVD20XBEVM boards to simulate multiple receiver nodes
  • Includes footprints for D package version of devices, so entire family of SN65MLVD20X transceivers can be evaluated
  • Flexible termination
  • This evaluation module has the complete circuit for the full-duplex and half-duplex M-LVDS (...)

Design tools & simulation

SIMULATION MODEL Download
SLLM452A.ZIP (46 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options
WQFN (RUM) 16 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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