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D-type flip-flops

SN74AHCT273

ACTIVE

Octal D-Type Flip-Flops With Clear

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Data sheet

SN74AHCT273

ACTIVE
Data sheet Order now

Product details

Number of channels 8 Technology family AHCT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (max) (MHz) 70 IOL (max) (mA) 8 IOH (max) (mA) -8 Supply current (max) (µA) 40 Features Balanced outputs, Very high speed (tpd 5-10ns) Operating temperature range (°C) -40 to 125 Rating Catalog
Number of channels 8 Technology family AHCT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (max) (MHz) 70 IOL (max) (mA) 8 IOH (max) (mA) -8 Supply current (max) (µA) 40 Features Balanced outputs, Very high speed (tpd 5-10ns) Operating temperature range (°C) -40 to 125 Rating Catalog
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) VQFN (RKS) 20 11.25 mm² (4.5 mm × 2.5 mm) SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm) SSOP (DB) 20 56.16 mm² (7.2 mm × 7.8 mm) VSSOP (DGS) 20 24.99 mm² (5.1 mm × 4.9 mm) PDIP (N) 20 228.702 mm² (24.33 mm × 9.4 mm)
  • Inputs are TTL-voltage compatible
  • Contain eight flip-flops with single-rail outputs
  • Direct clear input
  • Individual data input to each flip-flop
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 200V machine model (A115-A)
    • 1000V charged-device model (C101)
  • Inputs are TTL-voltage compatible
  • Contain eight flip-flops with single-rail outputs
  • Direct clear input
  • Individual data input to each flip-flop
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 200V machine model (A115-A)
    • 1000V charged-device model (C101)

These devices are positive-edge-triggered D-type flip-flops with a direct clear ( CLR) input.

These devices are positive-edge-triggered D-type flip-flops with a direct clear ( CLR) input.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74AHCT273 Octal D-Type Flip-Flops With Clear datasheet (Rev. G) PDF | HTML Aug 26, 2024
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML Dec 15, 2022

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
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Package Pins CAD symbols, footprints & 3D models
SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
VQFN (RKS) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
SSOP (DB) 20 Ultra Librarian
VSSOP (DGS) 20 Ultra Librarian
PDIP (N) 20 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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